Senior Principal Firmware Engineer

About the Company
Cadence is a pivotal leader in electronic design, building upon more than 30 years of computational software expertise. The company applies its underlying Intelligent System Design strategy to deliver software, hardware and IP that turn design concepts into reality. Cadence customers are the world’s most innovative companies, delivering extraordinary electronic products from chips to boards to systems for the most dynamic market applications including consumer, hyperscale computing, 5G communications, automotive, aerospace industrial and health
The Cadence Advantage
The opportunity to work on cutting-edge technology in an environment that encourages you to be creative, innovative, and to make an i
mpact.Cadence’s employee-friendly policies focus on the physical and mental well-being of employees, career development, providing opportunities for learning, and celebrating success in recognition of specific needs of the empl
oyees.The unique “One Cadence – One Team” culture promotes collaboration within and across teams to ensure customer su
ccess.Multiple avenues of learning and development available for employees to explore as per their specific requirement and inte
rests.You get to work with a diverse team of passionate, dedicated, and talented individuals who go above and beyond for our customers, our communities, and each other—ever
y day.
Location: Bangalore
Qualifications
BE/BTECH/ME/METCH or Equivalent Degree
About the Role
Senior Principal Firmware Engineer. This is an opportunity to join a dynamic and growing team of experienced engineers developing physical layer IP’s for industry-standard high-speed serial-link protocols, as applied to Die-2_die and Chiplet Interconnects. The successful candidate will ideally be a highly motivated self-starter who is able to work independently to complete assigned tasks and can also contribute to project leadership. It is expected that the candidate will contribute during all phases of firmware development for high speed Die-2-Die, UCIe IPs from firmware architecture development to implementation, verification, testing and cust
omer deployment.
Responsibilities
Work closely with UCIe PHY digital and mixed signal architects to figure out the details of FWfunctions and sequences. Contribute during firmware architecture development and implementation of the defined firmware features. Help to build system level prototype control software to develop/validate adaptation, equalization, and control algorithms for
high speed UCIe IPs. Validate the developed firmware in Emulation based models
and in Simulations. Implement assigned FW features and work closely with verification [simulation] and validation team to ensure the functionality and robustness of the i
mplemented features. Support of Validation team during electrical and system characterization during post-silicon testing. Identify any FW and HW related functionality and performance issues and implement any necessary FW improvement and work around codes to address these issues. Support Product Engineering, System Validation and Design team to debug IP issues during customer deployment of the IP an
d provide hot fixes. Create and maintain comprehensive documentation related to firmware design, development, bug fixes and
compliance testing.
Required Skills
B.Tech with 10yrs or M.Tech with 9yrs in Electrical/
Electronics Engineering. Solid programming knowledge in C/C++ and Python.Understanding of wireline communication principles and digital signal processing techniques are must.Strong problem solving and communication skills.Hands on Proven experience in developing for Hardware based DSP acceleration engines.Experience with silicon validation process and debug is a plus.Experience with digital verification environment and tools is a plus.Code development and debug expertise, co
de profiling using IDEs.

Work arrangement
No