Senior Product/Test Engineer

Senior Test Engineer – NPI Test & DFT MethodologyRole Summary
We are looking for a Senior Test Engineer to join our Automotive MCU NPI Test Engineering organization.
In this role, you will be responsible for defining and delivering robust manufacturing test solutions from product concept through production ramp. You will lead test strategy development, DFT engagement, ATPG integration, silicon bring-up, characterization, qualification, and production release for complex automotive MCU products.
As the DFT and test methodology subject matter expert, you will work closely with Design, DFT, Product Engineering, Validation, Reliability and Manufacturing teams to ensure optimal test coverage, quality, test cost, and time-to-market.
The successful candidate is expected to provide technical solution across multiple concurrent NPI programs while mentoring engineers and driving best-in-class test methodologies.
Job Responsibilities
Design for Test (DFT) and Test Strategy
Define and review Design-for-Test (DFT) requirements with Design and DFT teams during product development.
Review and assess:
Scan architecture
Scan compression methodologies
MBIST/LBIST implementation
Boundary Scan / JTAG architecture
On-chip clock controller (OCC) implementation
Functional Safety test requirements
Evaluate ATPG coverage, pattern count, diagnosis capabilities, and manufacturing test risks before tape-out.
Drive DFT reviews and contribute to coverage closure and testability improvements.
ATPG and Scan Test Development
Work closely with DFT teams on ATPG pattern generation, validation, integration, and debug.
Analyze and review:
Stuck-at fault coverage
Transition fault coverage
Cell-aware testing
Path delay testing
Diagnosis patterns
Define scan test methodologies for wafer sort and final test production environments.
Optimize scan testing for:
Test execution time
Pattern memory utilization
Multisite efficiency
Manufacturing throughput
Develop reusable scan test frameworks and methodologies across MCU product families.
Silicon Bring-Up and Debug
Lead first silicon bring-up activities and manufacturing test readiness.
Drive debug and root-cause analysis for:
Scan failures
ATPG-related failures
Silicon correlation issues
DFT implementation issues
Work with Design and DFT teams to resolve testability and quality concerns during NPI.
Support incremental test program releases aligned with project milestones.
Yield Learning and Production Ramp
Lead scan diagnosis and yield-learning activities.
Analyze production data to identify:
Systematic yield loss
Test escapes
Coverage gaps
DPPM improvement opportunities
Drive corrective actions and continuous improvement activities.
Deliver robust production test solutions meeting quality, cost, and manufacturing requirements.
Qualifications
Required Qualifications
Master's degree in Electrical Engineering, Computer Engineering, or related technical discipline.
10+ years of experience in Semiconductor Test Engineering, Product Engineering, DFT, ATPG, or Manufacturing Test Development.
Strong hands-on expertise in:
Scan ATPG
Scan compression technologies
Fault simulation
Scan diagnosis
MBIST/LBIST
Boundary Scan/JTAG
Silicon debug
Experience with ATPG tools such as:
Siemens Tessent
Synopsys TestMAX/TetraMAX
Cadence Modus
Experience developing test programs for complex digital and mixed-signal ICs, including:
Automotive MCU
Embedded Flash/NVM
SRAM
Scan-based manufacturing test
Experience with production ATE platforms such as:
Teradyne UltraFLEX / IGXL
Advantest platforms
Strong software and scripting skills:
Python
C/C++
TCL
Perl
Linux environments
Strong problem-solving, debugging, and analytical capabilities.
Preferred Qualifications
Experience with Automotive MCU products and Automotive Quality requirements.
Understanding of ISO26262 Functional Safety concepts and manufacturing test implications.
Experience supporting products from DFT definition through volume production.
Experience leading first silicon bring-up, yield ramp, and diagnosis activities.
Experience in test automation, data analytics, and statistical analysis tools such as JMP.
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