Senior ASIC IP verification Engineer

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The Role
The focus of this role is to plan, build, and execute the verification of new and existing features for AMD’s custom silicon/ASIC designs, resulting in no bugs in the final design.
THE PERSON:
You have a passion for modern, complex processor architecture, digital design, and verification in general. You are a team player who has excellent communication skills and experience collaborating with other engineers located in different sites/timezones. You have strong analytical and problem-solving skills and are willing to learn and ready to take on problems.
Key Responsibilities
Collaborate with the Arch, Design, Functional DV, Emulation, Platform Debug, etc teams to understand Architecture and verification asks
Ability to come with detailed testplan based on the Arch specs
Good understanding and exposure to SoC design and architecture
5+ years of Design Verification experience with strong Verilog, System Verilog, C and UVM/OVM knowledge
Candidate should be able to develop Testbench. Thorough understanding of verification environments including need, methodology, stimulus, checkers, scoreboards, coverage aspects. Developing functional coverage & assertions.
Own the DV sign-off and ensure a bug free design
Work with the post-silicon team on debug support and to help root-cause any failures
Have worked on wireless protocol design verification
Bringing up Testbench/SoC verification environment. Good understanding of SoC RESET/CLOCK flow
Exposure to DEBUG concepts such as JTAG etc
Comfortable with VCS/Verdi and excellent debug skills
Logical in thinking and ability to gel well within a team
Good communication skills
Continuously drive methodology improvements to improve efficiency
Mentor junior engineers to build a high performing team
PREFERRED EXPERIENCE:
Proficient in SoC/sub-system/IP level ASIC verification
Proficient in debugging firmware and RTL code using simulation tools
Proficient in using UVM testbenches
Experienced with Verilog, System Verilog, C, and C++
Worked on any High Speed Interface like PCIE/DDR/USB/Other, Good understanding of AXI/AHB/APB Bus protocol
Prior knowledge of ARM/RISC Processor based designs verification and bring-up verification
Developing UVM based verification frameworks and testbenches, processes and flows
Good understanding and hands-on experience in the UVM concepts and SystemVerilog language
Scripting language experience: Perl, Python, Makefile, shell preferred.
Academic Credentials
Bachelors or Master's degree in computer engineering/Electrical Engineering with 5+Yrs
Benefits offered are described: AMD benefits at a glance.
AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.
AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD’s “Responsible AI Policy” is available here.
This posting is for an existing vacancy.

Work arrangement
No