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Overview of the Role
As a Lead FPGA Design Engineer at HCLTech, you will play a pivotal role in architecting and implementing advanced FPGA solutions that power mission-critical applications for global clients. We are looking for minimum 8 yrs of experienced candidate.
Detailed Responsibilities
Lead the design, development, and verification of FPGA-based systems using industry-standard tools and methodologies.
Architect and implement complex RTL (Register Transfer Level) designs, ensuring high performance and optimal resource utilization.
Utilize FPGA HAPS (High-performance ASIC Prototyping System) platforms for development, prototyping, and validation.
Collaborate with cross-functional teams, including hardware, software, and systems engineering, to define requirements and deliver integrated solutions.
Oversee project timelines, technical reviews, and design documentation to ensure compliance with industry standards and customer requirements.
Mentor and guide junior engineers, fostering best practices in FPGA design and verification.
Troubleshoot and resolve issues in FPGA designs through simulation, synthesis, and on-board debugging.
Stay updated with the latest advancements in FPGA technologies and incorporate relevant innovations into design processes.
Skill Requirements
Bachelor's or Master’s degree in Electronics/Electrical Engineering, Computer Engineering, or a related field.
Proven experience in FPGA architecture, design, and development, ideally in a lead or senior engineering capacity.
Deep expertise in RTL design using VHDL/Verilog/SystemVerilog.
Hands-on experience with FPGA HAPS platforms and ASIC prototyping.
Proficiency with FPGA design tools (e.g., Xilinx Vivado, Intel Quartus, Synopsys Synplify).
Strong understanding of digital logic, timing analysis, synthesis, and verification methodologies.
Excellent problem-solving skills and the ability to manage multiple priorities in a fast-paced environment.
Effective communication skills for technical documentation and cross-team collaboration.
Other Requirements (Optional)
Experience with scripting languages (e.g., Python, Tcl) for automation of design flows.
Familiarity with high-speed interfaces and protocols (e.g., PCIe, DDR, Ethernet).
Exposure to hardware/software co-design and embedded systems.
Industry certifications relevant to FPGA or ASIC design.
Work arrangement
No
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