Memory Design Lead/Principal Engineer

About the Company
Cadence is a pivotal leader in electronic design, building upon more than 30 years of computational software expertise. The company applies its underlying Intelligent System Design strategy to deliver software, hardware and IP that turn design concepts into reality. Cadence customers are the world’s most innovative companies, delivering extraordinary electronic products from chips to boards to systems for the most dynamic market applications including consumer, hyperscale computing, 5G communications, automotive, aerospace industrial and health.
The Cadence Advantage
The opportunity to work on cutting-edge technology in an environment that encourages you to be creative, innovative, and to make an impact.
Cadence’s employee-friendly policies focus on the physical and mental well-being of employees, career development, providing opportunities for learning, and celebrating success in recognition of specific needs of the employees.
The unique “One Cadence – One Team” culture promotes collaboration within and across teams to ensure customer success.
Multiple avenues of learning and development available for employees to explore as per their specific requirement and interests.
You get to work with a diverse team of passionate, dedicated, and talented individuals who go above and beyond for our customers, our communities, and each other—every day.
About the Role
Cadence is recruiting highly motivated Memory Designers to work in the Memory IP team based in Hyderabad. The roles and responsibilities will include the design, simulation and verification of custom memory design blocks.
Responsibilities
Circuit design & simulation of memory circuits
Characterization
Functional simulations and statistical analysis
Sign off and release the memory IPs
Designing circuits for Memory testchip
Silicon bring-up and characterization
Qualifications
Experience in SRAM/ROM/TCAM Memory designs
Requires Bachelor/Masters/PhD in Electrical, VLSI, Microelectronics
5-15 years of experience.
Proficient knowledge of and experience with Cadence, Mentor Graphics, Synopsys tools for schematic design & simulations.
Experience in timing characterization
General concepts around Circuit design, Reliability analysis, Statistical analysis of circuits should be good.
Good technical verbal and written communication skills
Ability to work with cross functional teams
Ability to handle concurrent projects.
Required Skills
Knowledge in various technologies like Bulk, CMOS & SOI process is desirable
Hands on knowledge of state-of-the-art memory or analog design flows
Programming experience applicable to design flow automation tasks
Exposure to 2nm, 3nm, 5nm technology nodes is an advantage.
Exceptional Spoken and Written Proficiency in English
Strong analytical and problem-solving skills
Preferred Skills
If interested, share your profile to dsupriya@cadence.com

Work arrangement
No