Design Verification Engineer

TPU Verification Engineer (DV)
Experience: 5+ Years
Location: Bangalore
Job Summary:
We are looking for a TPU Verification Engineer with strong experience in Design Verification using SystemVerilog and UVM. The candidate will be responsible for verifying TPU-based IPs/subsystems and debugging functional issues.
Key Responsibilities:
Develop verification plans and test benches.
Perform functional verification and debug failures.
Develop and maintain UVM-based test environments.
Perform register and protocol verification.
Verify interfaces such as APB, AXI, UART, SPI, and I2C.
Work with RAL/Register Model verification.
Mandatory Skills:
SystemVerilog (SV)
UVM
APB, AXI
RAL Flow / Register Model Verification
Good to Have:
Experience with TPU-based IPs/subsystems
ARM Peripheral IP verification
UART, SPI, I2C experience

Work arrangement
No