Senior Signal Integrity / Power Integrity (SI/PI) Engineer

Signal Integrity / Power Integrity (SI/PI) Engineer
We are looking for an experienced SI/PI Engineer with strong expertise in high-speed semiconductor and system-level Signal Integrity and Power Integrity analysis.
Key Responsibilities
Perform end-to-end SI/PI analysis across Die, Package, Board and System.
Analyze and optimize high-speed SerDes, DDR/LPDDR and other high-speed interfaces.
Perform channel analysis, S-parameter extraction, crosstalk, eye-diagram and PDN analysis.
Develop 2D/3D electromagnetic models and perform package/board interconnect analysis.
Support product development from specification and architecture through design, validation and product release.
Correlate simulation results with lab measurements and troubleshoot SI/PI issues.
Work closely with ASIC/SoC, package, PCB, hardware, validation and system teams.
Required Skills
5–15 years of relevant SI/PI experience.
Strong understanding of Signal Integrity and Power Integrity principles.
Hands-on experience with high-speed interfaces such as SerDes and DDR/LPDDR.
Strong knowledge of transmission lines, S-parameters, crosstalk, eye diagrams, jitter and PDN.
Experience in package and/or board SI/PI analysis.
Experience with S-parameter extraction, 2D/3D EM modeling and simulation-to-measurement correlation.
EDA / Simulation Tools
Hands-on experience with multiple SI/PI tools such as:
Ansys HFSS / SIwave, Cadence PowerSI / SystemSI, Siemens HyperLynx / Advanced Solver, Keysight ADS, HSPICE / Broadband SPICE or equivalent tools.
Preferred Experience
PCIe, XAUI, SGMII, JESD204, 10G-KR or similar high-speed protocols.
NAND, SSD, DIMM, memory or high-speed semiconductor products.
Programming/scripting using Python, Perl or Tcl.
Strong analytical, debugging and cross-functional communication skills.
Experience Level
5–15 years | SI/PI | Semiconductor / High-Speed Systems

Work arrangement
No