🚀 AUMChip is Building a 20-Member Elite Experience in Semiconductor | Quantum | Ai | Robotics | Space Team

We are looking for 20 exceptional engineers, researchers, PhD scholars and top IIT students who want to work on something far beyond a conventional internship.
What is AUMChip?
AUMChip is building a deterministic compute architecture spanning:
Quantum Computing × AI × Robotics × Space × Semiconductors
Our work has progressed substantially beyond an idea stage. The current architecture has gone through extensive RTL verification and pre-silicon implementation work, including RTL-to-GDS physical implementation, formal verification, gate-level verification, FPGA emulation and multi-platform validation.
The next objective is to take this architecture through Indian semiconductor technology toward prototype silicon.
India's SCL operates an 8-inch, 180 nm CMOS fab and provides capabilities spanning synthesis, physical design, DRC/LVS, PEX, physical STA and GDSII release.
SCL +1
🌐 Why AUMChip different ?
AUMChip is not only a chip architecture.
It is being developed around “.aum”, an AUMChip-associated computing/data format and language ecosystem, with an IANA media-type registration associated with the project. IANA maintains the global media-type registration system.
Iana
One core. Multiple domains🚀
The AUMChip architecture is designed to provide a common deterministic compute foundation for:
AI • Robotics • Space • Quantum
Rather than building four disconnected accelerators, our approach is to develop one verified core architecture that can be adapted across these workloads and hardware substrates.
The architecture has already undergone extensive RTL verification, FPGA emulation and cross-substrate validation across multiple implementation platforms. The next step is to take that verified architecture toward Indian semiconductor fabrication and physical silicon validation.
Our ambition is to build an Indian sovereign compute stack — architecture → compiler → format/language → hardware → silicon.
🇮🇳 The India opportunity
We intend to work closely with India's emerging semiconductor ecosystem and explore opportunities with Indian government, semiconductor laboratories, research institutions and manufacturing partners.
The objective is simple:
Design in India → verify in India → fabricate in India → build IP from India.
🏭 Physical infrastructure
AUMChip's team also has access to an 18,000 sq. ft. industrial facility in Masuri Industrial Area, Phase 1, where we are preparing to establish a dedicated semiconductor/advanced hardware laboratory.
This gives selected team members the opportunity to work not only on software simulations, but toward real hardware, laboratory validation and eventually silicon.
💰 Equity / ESOP opportunity
We are currently raising $18M Pre-Series A to accelerate AUMChip's semiconductor, compute and R&D roadmap.
We intend to create an ESOP pool of up to 5% for the selected 20-member technical team, subject to formal ESOP documentation, vesting and company approvals.
Early contributors who join at this stage can potentially participate in the value created as AUMChip progresses from pre-silicon architecture → prototype silicon → commercial deployment.
🔬 Who are we looking for?
Only 20 positions.
Quantum Engineers
Quantum Computing Researchers
PhD Scholars / Research Scholars
VLSI / ASIC Engineers
RTL / Verilog / SystemVerilog Engineers
Computer Architecture Researchers
Quantum Error Correction Researchers
FPGA Engineers
Physical Design / RTL-to-GDS Engineers
EDA / Verification Engineers
AI Hardware Researchers
Semiconductor Algorithm Researchers
C/C++ / Python Engineers
IITs and other top engineering/research institutions preferred.
Exceptional candidates from outside IITs are absolutely welcome if their technical ability is outstanding.
Why join at this stage?
Because early in a deep-tech company is when the biggest technical impact is possible.
You won't be joining to maintain someone else's product.
You'll be joining to help build the architecture, tools, verification, hardware and silicon of an ambitious Indian semiconductor company from the ground up.
20 people. One mission. Build something India can own.
Early-stage founding opportunity: Selected contributors will participate in the initial development phase with an ESOP opportunity of up to 5% collectively for the 20-member team. Paid positions and fixed salaries will commence from January 1, 2027, based on role and formal employment/engagement terms.
📩 If you believe you belong on this team, apply/contact us.

Work arrangement
No