Senior Analog Circuit Design Engineer

Job Title: Senior Analog Circuit Design Engineer
Location: Bangalore, Karnataka
Experience: 5+ Years
Employment Type: Full-time
Job Summary
We are looking for an experienced Analog Circuit Design Engineer with 5+ years of hands-on experience in analog/mixed-signal IC design. The candidate will be responsible for transistor-level circuit design, simulation, verification, optimization, and supporting analog IP development from specification through tape-out.
Key Responsibilities
Design and develop transistor-level analog and mixed-signal circuits/IPs.
Develop and optimize analog blocks such as:
Operational Amplifiers
Comparators
Current Mirrors
Bias Circuits
Bandgap References (BGR)
LDOs
Voltage References
Oscillators
PLL/Clock-related blocks
Perform schematic design, circuit simulation, corner analysis and Monte Carlo analysis.
Analyze and optimize designs for PVT, power, performance, area, noise and reliability.
Perform pre-layout and post-layout simulations, including parasitic-aware verification.
Work on EMIR, reliability and electrical rule checks.
Collaborate closely with Analog Layout, Digital Design, Verification and System teams.
Debug circuit-level issues and provide solutions for performance and functionality challenges.
Support design reviews, documentation and tape-out activities.
Contribute to silicon validation and post-silicon debugging, where applicable.
Mentor junior engineers and contribute to improving design methodologies.
Required Skills
5+ years of hands-on experience in Analog Circuit Design / Analog IC Design.
Strong fundamentals in CMOS transistor-level circuit design.
Strong understanding of:
Analog circuit analysis
MOSFET fundamentals
Amplifiers
Biasing circuits
Current mirrors
Feedback and stability
Noise and mismatch
PVT/corner analysis
Hands-on experience with Cadence Virtuoso.
Strong experience with SPICE-based simulation tools such as Spectre/PrimeSim.
Experience in pre-layout and post-layout verification.
Knowledge of analog layout concepts such as matching, shielding, common-centroid techniques and parasitic effects.
Good understanding of EMIR and reliability analysis.
Strong analytical and debugging skills.
Good to Have
Experience with LDO, BGR, PLL, ADC/DAC, Oscillator or PMIC blocks.
Experience with advanced CMOS technology nodes.
Exposure to silicon bring-up, characterization and debugging.
Scripting knowledge in Python / Perl / TCL / SKILL.
Experience working with cross-functional Analog, Layout and Digital teams.
Tape-out experience.
Education
B.E./B.Tech/M.E./M.Tech in Electronics & Communication Engineering, Electrical Engineering, VLSI or related fields

Work arrangement
No