Pre/Post  Silicon Validation Framework/Tools / Infra development engineer

Company
Qualcomm India Private Limited
Job Area
Engineering Group, Engineering Group > Hardware Engineering
General Summary
Qualcomm's System Validation & Emulation (SVE) organization is seeking exceptional engineers with deep expertise in Embedded Software Architecture, Framework Development, Validation Infrastructure, and System Software Debug. The ideal candidate will possess strong software architecture skills and the ability to root-cause complex issues across multicore, multiprocessor, and heterogeneous SoC environments spanning hardware, firmware, operating systems, validation frameworks, and system infrastructure.
Minimum Qualifications
Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 4+ years of Hardware Engineering or related work experience.
OR
Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience.
OR
PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience.
Responsibilities
Architect, design, develop, and maintain scalable embedded software frameworks, validation infrastructure, and platform software for pre-silicon and post-silicon SoC validation.
Develop reusable framework components, platform abstraction layers, middleware, and system software services supporting multicore and heterogeneous compute environments.
Drive software architecture and framework design to enable portability, scalability, maintainability, and reuse across multiple SoC programs and IP validation domains.
Develop and maintain bring-up, validation, and debug infrastructure for bare-metal, lightweight RTOS, emulation, FPGA, and post-silicon environments.
Debug and root-cause complex system-level issues spanning hardware, firmware, operating systems, framework software, memory subsystems, coherency fabrics, and system infrastructure IPs.
Develop framework capabilities supporting multicore, multiprocessor, and heterogeneous CPU architectures, including system-level synchronization, coherency, and performance optimization.
Design, implement, and optimize automated validation, regression, and release workflows to improve productivity, quality, and scalability.
Integrate static analysis, code-quality tools, build systems, and release processes into Continuous Integration (CI) environments.
Collaborate closely with architecture, design, verification, firmware, software, and validation teams to enable efficient silicon bring-up, feature validation, and debug.
Drive continuous improvements in software quality, framework architecture, automation, and validation methodologies.
Minimum Qualification
Bachelor’s or Master’s degree in Computer Science, Electronics & Communication Engineering, Electrical Engineering, Computer Engineering, or a related field.
6+ to 10 years of industry experience in Embedded Software, System Software, SoC Validation, Silicon Enablement, Platform Software, Framework Development, or related domains.
Proven experience in embedded software architecture, framework development, low-level software design, and complex system-level debug.
Strong analytical, problem-solving, and debugging skills in hardware-software integrated environments.
Mandatory Skills
Strong expertise in Embedded Software Architecture, Framework Design, and Infrastructure Development using C, C++, and Assembly.
Proven experience designing and developing scalable software frameworks, platform abstraction layers, middleware, validation infrastructure, and reusable system software components.
Extensive experience in low-level software development, including boot code, exception handling, interrupt management, startup sequences, and C-Assembly interworking.
Deep understanding of CPU architectures and microarchitectural concepts, including ARMv8/ARMv9, x86, and PowerPC architectures.
Strong expertise in multicore, multiprocessor, and heterogeneous SoC environments, including SMP, AMP, heterogeneous compute subsystems, and cross-core software interactions.
Demonstrated ability to debug complex system-level issues spanning hardware, firmware, operating systems, framework software, and validation infrastructure.
Strong understanding of cache coherency, I/O coherency, memory ordering, synchronization primitives, inter-processor communication, and concurrency-related issues.
Deep knowledge of SoC architecture, including compute subsystems, memory hierarchies, interconnect fabrics, power management, and system infrastructure IPs.
Strong understanding of Operating Systems, RTOS, and Linux kernel internals, including multithreading, scheduling policies, locking mechanisms, interrupt handling, virtual memory, MMU architecture, and kernel synchronization primitives.
Deep understanding of memory management, weakly ordered memory models, cache architectures, pipelining, memory barriers, TLBs, coherency protocols, and performance optimization techniques.
Strong expertise in software build infrastructure, compiler toolchains, linker internals, Makefiles, linker/scatter scripts, and build system architecture.
Proficiency with GCC, Clang/LLVM, ARM toolchains, code optimization techniques, and root-causing complex compiler and linker issues.
Strong debugging expertise using JTAG, trace, emulation, FPGA, and silicon debug tools.
Proficiency in Python and Shell scripting for automation, framework development, debug, and productivity tooling.
Desired Skills
Experience architecting and developing large-scale embedded software frameworks or validation infrastructure used across multiple engineering teams and SoC programs.
Experience with silicon bring-up, board bring-up, post-silicon validation, and hardware-software integration.
Hands-on experience with pre-silicon emulation, FPGA prototyping, and post-silicon debug environments.
Strong understanding of ARM-based SoC architectures, memory hierarchies, cache coherency protocols, interconnect fabrics, and system infrastructure IPs.
Experience developing framework abstractions supporting heterogeneous processing elements such as application processors, real-time processors, DSPs, AI/ML accelerators, and security subsystems.
Familiarity with CI/CD systems, automated regression infrastructure, release management, and software quality methodologies.
Experience with JTAG, Lauterbach Trace32, hardware trace, and performance analysis tools.
Experience with source code management systems such as Git and Perforce.
Familiarity with build automation, containerized development environments, and scalable software deployment workflows.
Experience mentoring engineers and driving technical direction for framework and infrastructure development initiatives.
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Work arrangement
No