Senior Digital Design Engineer

Top 100 Global Semiconductor MNC in the world
Bangalore
Description
We are a innovative enterprise that designs, develops, and delivers System-on-Chip products to customers worldwide. The company is focused on AR/VR, imaging, networking, storage, and other dynamic technologies that drive today’s leading-edge applications. We combine world-class expertise, experience, and an extensive IP portfolio to provide exceptional solutions and ensure a better quality of experience for customers. Founded in 2015, We are headquartered in Japan, and have offices in Japan, Asia, United States and Europe to lead its product development and sales activities.
Full job description
Front-End ASIC Design Engineer – Bangalore
Description
We are seeking a Front-End SoC/ASIC Design Engineer for our SoC business unit.
Responsibilities Include but are not Limited to:
Support customer’s design through all phases of ASIC execution
Ensure designs meet product Performance-Power-Area-Schedule requirements. Tasks may include Architecture / micro-Architecture; Logic Design; RTL integration and coding; Lint/CDC/DFT checks; Synthesis & supporting timing-closure; Contribute to and support Verification; Supporting Firmware and FPGA teams; Silicon bring-up.
Ensure deadlines for project milestones are met while maintaining quality.
Work effectively with internal and external (including customer and vendors) teams(Note: we haveteams located globally).
Display a results-focused attitude and accomplish Company/Team-goals.
Required/Desired Qualifications:
Bachelor’s Degree in EE or similar degree.
5+ years of professional design experience provided the work experience is solid micro-architecture and front-end design.
Hands-on ASIC front-end design, ideally in design services environments (product backgrounds acceptable).
Security: SoC Security architecture and micro-architecture in ARM-based System. Thorough familiarity with hardware Root-of-Trust, Secure Boot, ARM Trust-zones, MMU/MPU, Cryptographic engines, Secure Debug and TRNG, OTP/Fuses, Tamper detection, etc.
Debug: Experience and thorough knowledge of ARM CoreSight Debug architecture, including Trace components, external Debug interfaces and Software tools. Experience with Secure Debug is strongly desired.
Reliability, Availability, and Serviceability (RAS): Strong experience in ARM RAS, including error detection, reporting and poisoning mechanisms, fault injection, interconnect/fabric error management, etc.
Skills Required –
Micro-architecture at module/sub-system/chip-level
digital design of complex modules/sub-systems
solid understanding of clock-domain crossings
integration of IPs/modules/sub-systems designed by internal/external teams
experience using AMBA bus protocols
System Verilog experience
Lint and CDC execution and analysis
writing timing constraints and timing analysis; excellent debug skills; customer support.
Technical document writing skill
Teamwork, dedication, collaborative, strong communications, and interpersonal skills.
Ability to meet stringent deadlines and project timelines.
Skills Strongly Desired –
SoC Architecture experience. - ChipLets
Experience and domain-knowledge in at least 2-3 of these: CPU (preferably, ARM and/or RISC-V), or GPU, or DSP
SoC Memory hierarchy; NoC/Fabric; low-power design and verification
high-speed peripheral interfaces such as CSI, HDMI/DP, I3C, USB, PCIe
Machine-learning / AI; FPGA.
Contact:Uday
Mulya Technologies
muday_bhaskar@yahoo.com"
Mining The Knowledge Community"

Work arrangement
No