Physical Design Engineer

Company Description Adroitec Systems Pvt Ltd is a Bengaluru-based design and services company specializing in end-to-end semiconductor solutions from RTL to GDS. The organization focuses on delivering high-quality, on-time results while keeping customers informed at every stage of the project. With a team of highly skilled developers and engineers, Adroitec optimizes power, performance, and area (PPA) to provide best-in-class chip design solutions. The company offers services across the chip design space, including concept-to-silicon execution, mission-critical tapeout tasks, and resource augmentation. Adroitec’s team brings the combined experience of over 50 chip tapeouts, supporting both point services and turnkey project execution.
Role Description This is a full-time, on-site Physical Design Engineer role based in Bengaluru South. The Physical Design Engineer will work on implementing and optimizing digital IC designs, taking RTL through synthesis, floorplanning, placement, clock tree synthesis, routing, and sign-off. Responsibilities include collaborating with RTL, verification, and DFT teams, performing timing closure and power optimization, and ensuring designs meet performance and area targets. The role involves running and analyzing physical verification checks, resolving design and layout issues, and supporting mission-critical tapeout activities. The engineer will also participate in design reviews, maintain clear documentation, and contribute to continuous improvement of design flows and methodologies.
Qualifications
Candidates should possess strong skills in Physical Design, including synthesis, floorplanning, placement, routing, and timing closure.
Candidates should possess solid skills in Physical Verification, covering DRC, LVS, and sign-off checks.
Candidates should possess a strong foundation in Logic Design and Circuit Design, with understanding of digital design principles and basic analog effects.
Candidates should possess hands-on experience in RTL Design, including working with HDL languages and understanding front-end design flows.
Knowledge of industry-standard EDA tools (e.g., Synopsys, Cadence, or Siemens tools) for physical implementation and verification is highly beneficial.
A bachelor’s or master’s degree in Electrical Engineering, Electronics, VLSI, or a related field is preferred.
Strong analytical, problem-solving, and debugging abilities, along with good communication and teamwork skills, are expected.
Experience with low-power design techniques, advanced process nodes, and tapeout procedures will be an advantage.

Work arrangement
No