Live opening · Posted 5 days ago

PMIC Analog Design Engineer

Texas Instruments · Bengaluru, Karnataka, India
Oracle
You are 5 days behind. JobBeeper subscribers saw this role while it was still new.

At a glance

The key details from the original listing.

Posted 5 days ago
CompanyTexas Instruments
LocationBengaluru, Karnataka, India
SourceOracle
Listed5 days ago

Your early-applicant advantage

Live timing from JobBeeper.

Live data
0 min from Oracle publishing this role to us finding it
15 min median time from a role going live to a subscriber being told
6 hours subscribers had this role before this page existed
62,694 roles found in the last 24 hours — the newest are not on this site yet
Start your free trial →

About the role

Description supplied by the original job listing.

Change the world. Love your job.
We are looking for a highly skilled and passionate Analog Designer, with PMIC experience preferred, to partner with senior technical leads to execute PMIC programs, otaking primary ownership of assigned blocks/sub-systems while receiving architectural guidance on system-level decisions. This is a deeply technical, hands-on role — you will be doing circuit design, participating in layout reviews, PEX simulations, analysis leading to architecture decisions, and collaborating with cross-functional experts to deliver successful IPs and Products. Following are the key responsibilities:
• Design and deliver high-performance analog circuits and blocks needed for power converter circuits — buck, boost, LDO, and charge pump — meeting aggressive targets for power performance, efficiency, and transients.
• Contribute towards PMIC system architecture development and execute block-level designs against challenging performance, power, and area specifications.
• Own technical execution across the full IC design flow: schematic capture, simulation, layout review, post-layout verification, silicon bring-up, and characterization
• Serve as primary technical owner for one or more complex blocks, sub-system and converters (with some guidance & support) within multi-block PMIC products
• Ensure design quality, robustness, and reliability through in-depth technical reviews
• Collaborate with internal systems and architecture teams to resolve integration challenges and drive technical closure
• Mentor and support junior engineers on design methodology, tools, and best practices
Minimum requirements:
• Bachelor's degree in Electrical Engineering or related field (Master's or PhD preferred)
• 4+ years of analog/mixed-signal IC design experience with strong analog fundamentals and design understanding for standard blocks including BGRs, V2Is, Amplifiers, Comparators, Level shifters, Oscillators
• Experience with high-voltage circuit designs and high speed level shifters
• Familiarity with SOA (Safe Operating Area) & Reliability, Aging sims
• Strong understanding of mismatch effects and device noise, with experience in auto-zeroing, chopping, and statistical analysis
• Good understanding of Control Systems fundamentals, compensation, large signal analysis etc.
• Fully proficient and deeply comfortable with standard Power IC design flows end-to-end (Cadence Virtuoso, Spectre)
• Worst-case corner analysis, top-level and Monte Carlo simulation, and post-layout PEX sign-off
• Strong knowledge of BCD and/or advanced CMOS process trade-offs for high-performance Power IC design
• Ability to work independently and drive design related technical decisions with confidence and provide predictable development schedule for blocks & sub-systems based on the specifications, with high quality.
• Should be able to independently explore multiple options and come up with optimum architectures of blocks for given specs and execute with high quality while adhering to the schedules.
• Strong written and verbal communication skills
Preferred qualifications:
• Experience in designing blocks for PMICs in consumer electronics (mobile, laptops, wearables)
• Understanding of one or more converter control architectures: Adaptive/Constant On/Off Time, peak/valley/average current mode control
• Hands-on transistor-level design of integrated power FETs, gate drivers, oscillators, bandgap/bias circuits, error amplifiers, and frequency compensation networks
• High-efficiency design techniques with focus on performance while minimizing power and area.
• Working familiarity with multi-rail PMIC SoC integration: power sequencing, UVLO, OCP, OTP, and digital interfaces (I2C, SPI, MIPI I3C)
• Experience in customer-facing technical alignment and specification negotiation
• Physical layout understanding and key aspects including power routing, grounding, signal integrity, thermal management, and die area optimization
• Exposure to Simplis, AMS, or equivalent simulation tools (good to have)
• Experience of full / partial design ownership of Switching Converters, LDOs
• Full-cycle IC design experience: schematic, simulation, layout collaboration, post-layout verification, silicon validation, and characterization
• Ability to independently manage and execute multiple design tasks in parallel on aggressive schedules
• Mentoring Junior members and New College Graduates in the team

Get JobBeeper Mobile App

Never miss a job opening! Get instant job alerts on your phone.

Subscribers see fresh openings within minutes. Download the JobBeeper App on Google Play to get real-time push notifications and apply before anyone else.

⚡ Instant Push Alerts 🎯 Tailored Filters 🚀 Direct Employer Links
GET IT ON Google Play

More openings worth a look

Recently tracked roles with full details and direct application links.

6 roles
Good roles move before most people even see them. Tell JobBeeper what you want and get fresh matches delivered in minutes.
Start your free trial →
⚡ Get fresh job alerts 📱 Get App