Layout Designer | PMIC

Change the world. Love your job.
Texas Instruments is seeking an experienced Layout Designer to join our team! In this role you will be contributing to the development of power management ICs for high power density applications. This role centers on strong hands-on layout execution, close collaboration with circuit designers and the design team, and contributing to the adoption of new tools and flows. You’ll help push the boundaries of thermal and electrical performance in cutting-edge power solutions.
Minimum requirements:
Minimum education: Associate degree
Minimum of 5 years of experience.
Technical qualifications
Deep understanding of analog and power layout techniques, including matching, symmetry, current density, electromigration, and IR drop management
Experience with high-voltage design rules, isolation techniques, and device spacing for BCD/HV processes
Strong knowledge of parasitic-aware layout for sensitive analog blocks such as bandgaps, references, comparators, and op-amps
Familiarity with power device layout, including LDMOS, power MOSFETs, bond pads, and ESD structures
Proficiency with layout tools such as Cadence Virtuoso and verification flows including DRC, LVS, PEX, and parasitic extraction
Collaboration and execution qualifications
Ability to work closely with circuit designers and the design team to deliver high-quality layouts on schedule
Strong verbal and written communication skills within the design environment
Ability to adopt new systems, tools, and processes and contribute to improving team design flows
Demonstrated analytical and problem-solving skills, with the ability to collaborate effectively within the team
Strong time management and ownership, with the ability to take initiative and drive on-time project delivery