VLSI Engineers (Verification / Emulation / Physical Design / STA)

Maverick Semiconductor is hiring VLSI Engineers across the following domains:
🔹 Design Verification (DV)
Skills: IP/Subsystem/SoC Verification, SystemVerilog, UVM, Assertions (SVA), Functional & Code Coverage, Coverage Closure, UVC Development, AMBA (AXI/AHB/APB), PCIe/USB/Ethernet Protocol Verification, Low Power Verification (UPF), Functional Safety (ISO 26262), Security Verification, Formal Verification, Gate-Level Simulation (GLS), HWSW Co-Verification, Emulation Enablement, Debug & Regression Management.
🔹 Design for Test (DFT)
Skills: Scan Insertion, Scan Compression, ATPG, MBIST, LBIST, JTAG/Boundary Scan, Testability Analysis, Tessent, Modus, DFTMAX, Fault Simulation, Coverage Closure, Pattern Generation & Validation, Scan Debug, IEEE 1500, IEEE 1687 (IJTAG), Silicon Bring-up Support
🔹 Emulation
Skills: ZeBu, Palladium, Veloce, SCE-MI, Testbench Acceleration, FPGA Prototyping, HWSW Co-Verification, SoC Bring-up, Boot Validation, Performance Validation, Software-Driven Verification, Emulation Debug & Optimization.
🔹 Physical Design (PD)
Skills: Floorplanning, Power Planning, Placement, CTS, Routing, Physical Verification, IR/EM Analysis, Congestion Analysis, ECO Implementation, Low Power Implementation, MCMM Optimization, PPA Closure, ICC2, Innovus, Fusion Compiler, Block & Top-Level Implementation, Signoff Closure, 28nm/16nm/7nm/5nm/3nm Technology Nodes, FinFET Technologies.
🔹 Static Timing Analysis (STA)
Skills: PrimeTime, Timing Constraints (SDC), MCMM Analysis, Timing Closure, SI/Crosstalk Analysis, OCV/AOCV/POCV, PBA, ECO Closure, LVF, Derates, Timing Signoff Methodology.
Join us to work on next-generation ASIC/SoC projects with leading semiconductor customers.
📍 Location: India
📈 Experience: 2-8+ Years
Preferred Skills:
HDLs & Verification: Verilog, SystemVerilog, UVM, SVA, UPF, Formal Verification
Programming & Scripting: TCL, Python, Perl, Shell Scripting
EDA Tools: Synopsys, Cadence, Siemens EDA (Mentor Graphics)
Protocols & Architectures: AMBA AXI/AHB/APB, PCIe, USB, Ethernet, ARM-based SoCs
Emulation Platforms: ZeBu, Palladium, Veloce
Physical Design & STA: ICC2, Fusion Compiler, Innovus, PrimeTime, Timing Signoff, PPA Optimization
DFT: Tessent, Modus, DFTMAX, ATPG, Scan Compression, MBIST/LBIST
Domain Expertise: ASIC/SoC Design Flow, IP/Sub-System/SoC Development, Low Power Design & Verification, Functional Safety (ISO 26262), Security Verification
Why Maverick Semiconductor?
✅ Work on cutting-edge semiconductor products
✅ Exposure to advanced ASIC/SoC programs
✅ Strong technical leadership and mentorship
✅ Fast-growing, innovation-driven environment

Work arrangement
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