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Company Description Socsang Semiconductors Private Limited is a specialized engineering services company headquartered in Bangalore, Karnataka, India, focused on integrated circuit and systems (VLSI) design. The team provides expertise across IP development for standard cells, I/O, and memory, analog and mixed-signal design, hardware system signoff and validation, RTL design and verification, and DFT. The company’s major focus areas include SERDES, analog and mixed-signal design and layout, IP design and modelling / characterization, PCB and package design. Socsang also offers signal and power integrity signoff for high-speed interfaces across different packages and PCBs, giving engineers exposure to complex, cutting-edge semiconductor projects.
Role Description
As a Signal Integrity Engineer, you will work on the analysis and optimization of high-speed interfaces across PCBs and packages to ensure robust signal and power integrity.
You will perform simulations, create and review models, analyse eye diagrams and jitter,
Daily responsibilities include collaborating with different chip / system design teams and identify and mitigate the SI/PI risks. You will document methodologies, prepare reports, and support hardware bring-up and root-cause analysis for signal integrity issues. This is a full-time, on-site role located in the Greater Bengaluru Area.
Qualifications
Minimum 2+ years of experience in SI/PI signoff for Package/PCB
Understanding design principles and interface optimization for high-speed interfaces like DDR and SERDES.
Hands-on experience with Power Integrity analysis, including decoupling strategies, IR drop, and PDN design.
Proficiency in transmission lines, crosstalk, Controlled impedance, losses, stack-up
Experience with SI/PI tools (e.g., HyperLynx, Sigrity, Ansys, or similar) and familiarity with PCB and package design flows.
Bachelor’s or Master’s degree in ECE or Microwave / RF Engineering, or a related field.
Please send your profile to jobs@socsang.com, if you are really looking for a change.
Work arrangement
No
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