Live opening · Posted 2 days ago

Lead Analog IC Design Engineer — GaN Power Stage

Texas Instruments · Bengaluru, Karnataka, India (On-site)
Linkedin No
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At a glance

The key details from the original listing.

Posted 2 days ago
CompanyTexas Instruments
LocationBengaluru, Karnataka, India (On-site)
Work modeNo
SourceLinkedin
Listed2 days ago

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About the role

Description supplied by the original job listing.

About Texas Instruments
At TI, we engineer the future — one silicon innovation at a time. Our power management portfolio powers everything from electric vehicles to data centers, and now we're doubling down on Gallium Nitride (GaN) — the technology redefining what's possible in high-efficiency power conversion.
About the Role
We are assembling an elite team to design next-generation, high-efficiency GaN power stage ICs. As a GaN Power Architect, you will lead the full-stack execution — from silicon architecture to bench validation — of high-speed, high-voltage GaN gate drivers and integrated power stage building blocks.
You will be the critical bridge between advanced GaN semiconductor device physics and precision analog circuit design, driving breakthroughs in switching frequency, power density, and thermal performance.
What You'll Do
⚙️ Analog IC Design
Architect, design, and simulate custom analog and mixed-signal blocks for GaN power ICs
Design high-speed gate drivers, level shifters, bootstrap circuits, UVLO, thermal shutdown, and fast overcurrent protection circuits
🔬 Silicon-Device Co-Design
Partner with device physics experts to model and optimize driver-device interaction
Account for dynamic R_DSon, current collapse, gate-charge (Q_g) characteristics, and 2DEG behavior
⚡ Transient & Parasitic Management
Engineer robust circuits capable of withstanding extreme dV/dt (>100V/ns) and di/dt transients
Prevent false turn-on, shoot-through, and gate breakdown with surgical precision
📐 Layout & Co-Extraction
Collaborate with layout engineers for parasitics-aware design (PEEC/EM extraction)
Optimize ultra-low inductance driver loops and power interconnects
🧪 Silicon Validation
Lead bench characterization and debug of first-silicon in the lab
Validate switching dynamics, efficiency curves, protection response times, and thermal boundaries
What You Bring
✅ Education & Experience: B.S., M.S., or Ph.D. in Electrical Engineering (or related) with 5+ years of hands-on analog/mixed-signal IC design experience in high-voltage or wide-bandgap (WBG) power management
✅ Solid Analog Design Fundamentals — the kind that comes from doing, not just studying
✅ GaN Driver Expertise: Proven track record designing high-speed, high-voltage gate drivers for GaN HEMTs (discrete or monolithically integrated)
✅ GaN Device Physics: Deep understanding of V_th stability, gate degradation, Q_rr-equivalent loss mechanisms, dynamic R_DSon, and 2DEG physics
✅ EDA Proficiency: Expert-level use of Cadence Virtuoso, Spectre/Spectre21, Calibre (DRC/LVS/PEX), and parasitic extraction workflows for high-frequency/high-power layouts
✅ Lab & Debug Skills: Hands-on with high-bandwidth oscilloscopes, differential probes, and double-pulse testing setups
Bonus Points If You Have
⭐ Working knowledge of switching converter topologies — multiphase buck, resonant LLC, boost, or active clamp flyback
⭐ Experience with ultra-low inductance power packaging — QFN, flip-chip, embedded dies, or multi-chip modules
⭐ Exposure to volume GaN manufacturing, DFT, and high-reliability applications
Why TI?
🌍 Work on technology that powers the world's most critical systems
🔭 Access to world-class semiconductor fabrication and R&D resources
🤝 Collaborative culture where engineers lead innovation — not just execute it
💼 Competitive compensation, benefits, and long-term career growth

Work arrangement
No

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