Multimedia Test Engineer

Job Description: Post-Silicon Validation Architect (MIPI Display)
Location: Bangalore
Experience: 4+ years
Role Overview
The Post-Silicon Validation Architect will define validation strategies, test plans, and automation frameworks to qualify next-generation display chips. This role bridges hardware design, FPGA prototyping, and production software to ensure silicon meets all functional, performance, and reliability targets before mass production.
Key Responsibilities
Define post-silicon validation architecture, methodologies, and test strategies for display chipsets.
Lead silicon bring-up, reference boards, and FPGA prototypes; debug complex hardware/software defects.
Develop comprehensive test plans covering display protocols, frame buffer management, pixel pipelines, and image processing algorithms.
Design and scale automated test frameworks with high-speed validation equipment.
Collaborate with Design, Pre-Silicon Verification (SV/UVM), Emulation, and Firmware teams to root-cause chip bugs.
Required Technical Skills
Display, Video & Pixel Processing
Deep knowledge of MIPI DSI-2 physical and protocol layers.
Expertise in pixel formats (YUV444, RGB), bit depths (8/10/12-bit), and color fidelity.
Strong understanding of image processing pipelines (scaling, filtering engines).
Knowledge of display panels, drivers, demura algorithms, and color management systems.
Hardware Validation & Equipment
Hands-on with Introspect SV series or similar MIPI protocol analyzers/exercisers.
Experience with FPGA prototyping (Xilinx/Intel/Zebu).
Proficiency with oscilloscopes, logic analyzers, BERT, and other lab instrumentation.
Silicon Characterization & Verification
Bitstream verification methodologies.
Strong understanding of SystemVerilog/UVM.
PVT testing across process, voltage, and temperature corners.
Frame buffer validation: bandwidth, refresh rates, power-saving modes.
Full-stack functional validation of registers, interrupts, and power states.
Software, OS & Automation
Advanced Python programming for automation frameworks.
Firmware development/debugging in baremetal and RTOS environments.
Familiarity with display pipelines in Android (SurfaceFlinger/HWC) and Linux (DRM/KMS).
Debugging tools: gdb, Valgrind.
Experience with CI tools: SVN, Git, Jira.
Soft Skills
Strong problem-solving and analytical abilities.
Excellent communication skills for cross-functional collaboration.
Qualifications
Bachelor’s/Master’s in Electrical Engineering, Computer Engineering, or related field.
4+ years of experience in post-silicon validation within display, multimedia, or high-speed SoC environments.

Work arrangement
No