Live opening · Posted 17 days ago
At a glance
The key details from the original listing.
About the role
Description supplied by the original job listing.
Job Description:
Job duties include:
Build Test plans with all features for Block/Core/SoC and Write Functional Coverage for the features, participate in Reviews
Write scalable and re-usable test benches, using the framework of the verification methodology
Develop Pseudo-random tests to verify and get to full Functional Coverage
Debug Regression failures, analyze Functional coverage gaps and improve tests to cover the gaps
Document verification strategy including Test plans, Testbench, Random tests, etc.
Requirements:
Bachelor’s degree in electrical engineering or related degree with 5+ years relevant experience or master’s degree in electrical engineering or related degree with 3+ years relevant experience
Must have working knowledge of System Verilog and Verification methodologies like UVM/VMM
Should have good command of Object-Oriented Programming principles.
Have experience writing Functional Coverage, pseudo random tests
Knowledge of PCI Express protocol is a plus
R027159
Work arrangement
No
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