Live opening · Posted 5 days ago

Senior Product Engineer - Silicon Validation

Axiado · Ho Chi Minh City, Ho Chi Minh, Vietnam
Smartrecruiters No Full-time
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At a glance

The key details from the original listing.

Posted 5 days ago
CompanyAxiado
LocationHo Chi Minh City, Ho Chi Minh, Vietnam
Job typeFull-time
Work modeNo
SkillsPython
SourceSmartrecruiters
ListedPosted 5 days ago

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About the role

Description supplied by the original job listing.

About the Role
Axiado Corporation is seeking an experienced Product Engineer to lead silicon validation, test program development, and productization for our Trusted Control / Compute Unit (TCU) chips. In this role, you will define and execute test and validation strategies from silicon through high-volume manufacturing (HVM), working closely with cross-functional teams and external partners. This position is critical to achieving first-pass silicon success and a smooth HVM transition, while meeting quality, yield, and cost targets.
Key Responsibilities
Plan and execute comprehensive silicon characterization from first silicon through production release, including voltage–frequency–temperature (PVT) characterization, corner testing and production limit setting
Perform die-level and package-level bring-up and debug activities
Drive ATE–system correlation to validate test accuracy against system-level specifications.
Architect robust test flows that balance test time, coverage, yield learning, and cost for complex ASIC designs.
Develop, release, and productize ATE and SLT manufacturing test programs for wafer sort and final test.
Support OSAT bring-up and manage test program releases.
Ensure smooth transition of test programs from engineering into high-volume production.
Lead yield improvement initiatives using data-driven root cause analysis and statistical methodologies; perform yield and failure Pareto analysis.
Establish, track, and drive improvement of key quality metrics, including DPPM and test escapes.
Analyze field return and system-level failure data to identify test coverage gaps and implement improved screening methods.
Drive test cost reduction initiatives while maintaining high product quality and reliability.
Collaborate closely with design, system validation, reliability, operations, and manufacturing teams to resolve silicon and test-related issues.
Manage relationships with ATE vendors, OSAT partners, and foundry partners.
Lead NPI through HVM execution with multi-vendor qualification across multiple OSAT sites.
Qualification & Experience
Bachelor’s or Master’s degree in Electrical Engineering or a related discipline.
10+ years of hands-on experience in silicon validation, product engineering, and ATE test development for advanced-node semiconductors.
Strong experience with silicon characterization across PVT corners.
Proven track record of yield optimization and DPPM reduction, with measurable results.
Hands-on experience developing and optimizing ATE test programs for wafer sort and final test.
Demonstrated success leading NPI through high-volume manufacturing across multiple OSAT partners.
Strong understanding of test debug, failure analysis correlation, and yield enhancement techniques.
Scripting and automation skills using Python, Perl, or TCL for test data analysis and workflow automation.
Strong cross-functional leadership and communication skills during silicon bring-up, DFT validation, test methodology development, and manufacturing ramp.

Employment type
Full-time

Work arrangement
No

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