Live opening · Posted 3 days ago

Staff / Principal Spares Engineer, Operations Central Team

Micron Technology · Hiroshima - Fab 15, Japan
Workday
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At a glance

The key details from the original listing.

Posted 3 days ago
CompanyMicron Technology
LocationHiroshima - Fab 15, Japan
SourceWorkday
ListedPosted 3 days ago

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About the role

Description supplied by the original job listing.

Our vision is to transform how the world uses information to enrich life for all.
Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever.
As a Spares Engineering Engineer, you will:
Be a key driver in executing and managing programs within the Spare Engineering function — spanning both Spares Initiatives for Cost, Productivity, Quality and Test Wafer management. You will work in a fast-paced semiconductor environment, applying your technical expertise and program management skills to optimize efficiency, control test wafer utilization, align with demand, and deliver measurable results — all while collaborating across global teams and Sites
Responsibilities
Spares Engineering
Lead and execute spares engineering programs to drive operational and cost efficiency
Analyze metrics and demand trends to identify and act on improvement opportunities
Drive programs in a structured and systematic manner, ensuring milestones, timelines, and deliverables are consistently met
Identify process gaps and bottlenecks within spares engineering and implement effective corrective actions
Develop and present program status updates, reports, and recommendations to key stakeholders
Support technical aspects for Spares Related issues and drive for consistent improvement through collaboration with Suppliers
Be a category leader leading global strategy for Spares Lifetime, CCRR, Alternate Source and consumption reduction activities
Test Wafers
Coordinate with process and equipment engineering teams to optimize test wafer usage and minimize waste as well as fab additional space creation.
Establish and maintain test wafer planning processes aligned with engineering demand and capacity
Monitor test wafer utilization trends and provide data-driven recommendations to reduce costs and improve efficiency
Ensure proper documentation, traceability, and compliance for all test wafer transactions and usage records
Shared / Common
Collaborate cross-functionally with engineering, operations, supply chain, and leadership teams
Travel to multiple sites or Supplier locations as required to support program execution
Maintain accurate documentation and ensure compliance with engineering standards and best practices
Cross‑Functional & Cross‑Site Coordination
Enable collaboration across stakeholders including FE central planning functions, fab planning teams, SMAI, OCT and other central teams.
Act as a central integration point to ensure alignment across regions, functions
Support recurring global forums and programs specific reviews to ensure consistent execution and escalation of issues.
External Benchmarking and Analysis
Lead analysis and benchmarking efforts with competitors from Spares and Test Wafer front
Identify opportunities for improvement
Minimum Qualifications
Bachelor's degree or higher in Engineering (Electrical, Mechanical, Industrial, Materials, or related discipline) from an accredited university, OR equivalent engineering training/certification
~ 6 years of experience in the semiconductor industry
Demonstrated experience in engineering program management or productivity-related initiatives
Strong understanding of productivity concepts, demand planning principles
Familiarity with semiconductor wafer processes, test wafer usage protocols, or related engineering operations
Preferred Qualifications
Experience in spare parts management, equipment engineering, or semiconductor manufacturing environments
Familiarity with structured methodologies such as Lean, Six Sigma, or PDCA
Proficiency in data analysis tools such as Excel, Power BI, or equivalent platforms
Experience presenting to and influencing senior stakeholders
Hands-on experience with test wafer management, fab cost control, maxout programs
Understanding of wafer process flows and how test wafers are consumed at each engineering stage
Additional Requirements
Willingness and ability to travel domestically and/or internationally as business needs require
Self-motivated and results-driven with a proactive, ownership mindset
Strong organizational, analytical, and communication skills
Ability to manage multiple programs

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