Live opening · Posted 2 days ago

Technical Lead- PD-PV,Full Chip PNR

Quest Global · Hyderabad, Telangana, India (On-site)
Linkedin No
JobBeeper subscribers received an alert for this role.

At a glance

The key details from the original listing.

Posted 2 days ago
CompanyQuest Global
LocationHyderabad, Telangana, India (On-site)
Work modeNo
SkillsPython
SourceLinkedin
ListedPosted 2 days ago

Your early-applicant advantage

Live timing from JobBeeper.

Live data
15 min from Linkedin publishing this role to us finding it
9 min median time from a role going live to a subscriber being told
6 hours subscribers had this role before this page existed
39,590 roles found in the last 24 hours — the newest are not on this site yet
Start your free trial →

About the role

Description supplied by the original job listing.

Job Requirements
At Quest Global, it’s not just what we do but how and why we do it that makes us different. With over 25 years as an engineering services provider, we believe in the power of doing things differently to make the impossible possible. Our people are driven by the desire to make the world a better place—to make a positive difference that contributes to a brighter future. We bring together technologies and industries, alongside the contributions of diverse individuals who are empowered by an intentional workplace culture, to solve problems better and faster.
Role Overview
Lead full-chip netlist integration and readiness, ensuring clean connectivity, logical consistency, constraint alignment, and smooth handoff to implementation and signoff.
Key Responsibilities
Own top-level netlist assembly and integration checks
Resolve connectivity, hierarchy, naming, and interface issues
Validate design collateral, constraints, and implementation readiness
Coordinate with RTL, synthesis, PnR, STA, DFT, and PV teams
Automate checks and drive issue closure through release
Required Skills & Expertise
Strong understanding of netlist structure and hierarchical design
Experience with synthesis, PnR, STA, and connectivity checks
Proficiency in TCL, Perl, or Python scripting
Familiarity with Verilog/SystemVerilog and EDA databases
Strong debugging and cross-functional coordination skills
Preferred Skills
Full-chip integration experience on large SoCs
Exposure to formal or equivalence checking
Knowledge of DFT and low-power intent is a plus
Experience
8-12 years
Education
BE/BTech/MTech in Electronics or related field
We are known for our extraordinary people who make the impossible possible every day. Questians are driven by hunger, humility, and aspiration. We believe that our company culture is the key to our ability to make a true difference in every industry we reach. Our teams regularly invest time and dedicated effort into internal culture work, ensuring that all voices are heard.
We wholeheartedly believe in the diversity of thought that comes with fostering a culture rooted in respect, where everyone belongs, is valued, and feels inspired to share their ideas. We know embracing our unique differences makes us better, and that solving the worlds hardest engineering problems requires diverse ideas, perspectives, and backgrounds. We shine the brightest when we tap into the many dimensions that thrive across over 21,000 difference-makers in our workplace.

Work arrangement
No

Get JobBeeper Mobile App

Never miss a job opening! Get instant job alerts on your phone.

Subscribers see fresh openings within minutes. Download the JobBeeper App on Google Play to get real-time push notifications and apply before anyone else.

⚡ Instant Push Alerts 🎯 Tailored Filters 🚀 Direct Employer Links
GET IT ON Google Play

More openings worth a look

Recently tracked roles with full details and direct application links.

6 roles
Good roles move before most people even see them. Tell JobBeeper what you want and get fresh matches delivered in minutes.
Start your free trial →
⚡ Get fresh job alerts 📱 Get App