Sr. STA Engineer

Company Description NXP Semiconductors is a global leader in secure connectivity solutions for embedded applications, driving innovation across automotive, industrial and IoT, mobile, and communication infrastructure markets. Headquartered in Eindhoven, The Netherlands, NXP operates in more than 30 countries, with India serving as one of its largest R&D design centers and employing over 2,500 engineers across Noida, Bangalore, Hyderabad, and Pune. NXP India teams work on cutting-edge technologies and develop solutions across Advanced Analog, Automotive Processing, Connectivity & Security, Edge Processing, and Radio Frequency Processing, and are recognized as among the most innovative globally. With a presence in India since 1969 and a full-fledged Center of Excellence since 1990, NXP India focuses on IC and IP design, software development, and customer applications. NXP’s mission is to enable secure connections for a smarter world, delivering solutions that make everyday life easier, better, and safer.
Role Description This is a full-time, on-site Sr. STA Engineer role based in Noida. The Sr. STA Engineer will perform static timing analysis for complex SoC and IP designs, including constraint development, timing sign-off, and closure across multiple process, voltage, and temperature corners. The role involves working closely with front-end and physical design teams to identify and resolve timing bottlenecks, drive ECO implementation, and optimize performance, power, and area. The engineer will analyze timing reports, debug issues related to clocking, signal integrity, and CDC, and ensure that designs meet product and quality requirements. The position also includes supporting tape-out activities, contributing to methodology improvements, and mentoring junior team members on STA best practices and tools.
Qualifications
Strong expertise in Static Timing Analysis (STA), including constraint creation, timing closure, and sign-off for complex SoCs and IPs.
Hands-on experience with industry-standard STA and implementation tools (e.g., PrimeTime, Tempus, Innovus, ICC2, or equivalent).
Solid understanding of digital design concepts, clocking architectures, and physical design fundamentals (floorplanning, placement, routing).
Knowledge of advanced technology node challenges, including OCV, PVT variations, signal integrity, and power-performance-area trade-offs.
Proficiency in scripting for automation and data analysis (e.g., Python, Perl, TCL, or shell scripting).
Ability to collaborate with cross-functional teams, communicate clearly, and drive issue resolution under tight schedules.
Bachelor’s or Master’s degree in Electrical Engineering, Electronics, or a related field, with relevant industry experience in STA.
Experience in automotive or safety-critical semiconductor design, and familiarity with quality and reliability standards, is an advantage.

Work arrangement
No