SoC Design Verification Director

Director of SoC Design Verification
Top40 Semiconductor Organization in the world
Bangalore
Director of SoC Design Verification
Overview
We are seeking a seasoned Director of SoC Design Verification with 20+ years of experience to lead verification for our next-generation System-on-Chip products. This is a hands-on leadership role where you will define the SoC-level verification strategy, oversee execution across multiple IPs and subsystems, and ensure first-pass silicon success for complex designs in compute, networking, and storage domains.
Key Responsibilities
Own and drive the end-to-end SoC verification methodology, ensuring seamless integration of IP-level verification into system-level environ
ments.Lead, mentor, and grow a diverse team of engineers, fostering technical excellence, innovation, and collaboration.
Guide verification of complex SoC subsystems including HSIO, peripherals, interconnects, memory controllers, coherency fabrics, and system-level protocols.
Champion advanced methodologies (UVM, formal verification, emulation, AI-augmented flows) to accelerate coverage closure and improve efficiency.
Collaborate closely with RTL design, architecture, firmware, and validation teams to debug, refine, and optimize SoC-level verification processes.
Represent verification in executive reviews, customer engagements, and industry forums.
Shape workforce transformation by building hybrid skill sets and preparing the team for AI-driven verification challenges.
Qualifications
Bachelor’s degree in Electrical or Computer Engineering (Master’s pref
erred).
20+ years of experience in design verification, with a proven track record of leading teams and delivering complex SoC/silicon products.Deep expertise in SoC-level verification, including interconnect fabrics, coherency protocols, HSIO, and peripheral subsystems.
Strong background in UVM-based test plan development, assertions, coverage analysis, and abstraction layerdesign.
Demonstrated ability to manage priorities, engage with stakeholders, and drive organizational success.
Required Experience
Hands-on expertise with SoC-level verification environments, including integration of multiple IPs, HSIO, and peripherals
.Deep experience in UVM-based test plan development, sequence generation, and coverage analysis.
Strong background in writing assertions, cover properties, and analyzing coverage data at both IP and SoC levels.
Experience in developing scalable verification infrastructures to simplify and accelerate SoC-level deployments.
Preferred Experience
Expertise in verifying complex SoC subsystems such as NoC-based interconnects, coherency fabrics, HSIO, and memory hiearchies.
Experience with buffering, queuing, QoS, and system-level performance
analysis.Familiarity with emulation, FPGA prototyping, and hybrid verification flows.
Knowledge of AI-driven verification methodologies and workforce transformation strategies.
Experience with AI/ML accelerators, networking, automotive, data center, or high-performance computing SoCs.
Familiarity with low-power verification methodologies and power-aware verification.
Why
Join Us?
Opportunity to lead cutting-edge SoC development
programs.Influence verification strategy across next-generation
products.Build and grow a world-class verification organization.
Work with highly talented engineering teams on innovative technologies.
Skills
poweraware
SoC
NoC
Interconnects / interconnect
HSIO
Queuing
QoS
"AI-driven verification methodologies "
Emulation
Zebu
Veloce
Palladium
"FPGA Prototping"
"AI Accelerators"
"ML Accelerators"
"AI/ML Accelerators"
networking
switches
"data center"
HPC
hyperscaler
UVM
Contact:Uday
Mulya Technologies
muday_bhaskar@yahoo.com

Work arrangement
Hybrid