Live opening · Posted 11 hours ago
At a glance
The key details from the original listing.
About the role
Description supplied by the original job listing.
Hiring on behalf of our client, a fast-growing semiconductor design services company specializing in DFT. They work with leading semiconductor customers across advanced technology nodes and complex chip design programs.
We are looking for skilled DFT Engineers and Leads for advanced Design-for-Test implementation and validation on complex SoC / ASIC programs.
Key responsibilities
• Scan insertion, ATPG implementation and pattern generation
• MBIST, LBIST, EDT and compression implementation
• DFT simulations (timing and non-timing)
• JTAG / Boundary Scan, OCC and wrapper insertion
• ATPG debug and test coverage closure
• Collaboration with RTL, Physical Design and Verification teams
• For Leads: manage and lead a team of 8 to 10 members, covering day-to-day operations, task allocation, performance monitoring and timely delivery
Required skills
• Strong hands-on experience in Scan, ATPG, MBIST, JTAG, DFT simulations, compression/EDT, OCC and test points
• Good understanding of DFT methodologies and semiconductor test concepts
• Experience with industry-standard EDA tools
Preferred tools
Tessent, Synopsys DFT tools, Cadence Modus
Education
B.Tech / M.Tech in ECE / EEE / VLSI or related disciplines
How to apply
Apply here: https://vettedin.in/j/dft-engineer-lead-dft-engineer-deft-semicondutors?src=copy
Posted by Maple Green Services, a recruitment firm, on behalf of the client.
Work arrangement
No
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