DV ARM CORE SIGHT, CPU

Company Description Chipsolve Technologies Private Ltd is an ASIC IP and design services company founded by experienced semiconductor experts to support clients’ complex chip designs. The organization offers end-to-end design and verification services, including specification definition, logic partitioning, micro-architecture, RTL coding, synthesis, and advanced verification using UVM/OVM. With over 8 years of combined experience in chip design and production, Chipsolve is a rapidly growing technology partner for global semiconductor companies. The company has a workforce of more than 200 team members across offices in India, China, and the USA, with additional locations planned. Joining Chipsolve provides opportunities to work on challenging projects, collaborate with specialists, and contribute to innovative system-on-chip solutions.
Role Description The DV ARM CORE SIGHT, CPU role focuses on design verification of ARM-based CPU cores and CoreSight debug and trace components within complex SoC environments. This remote role involves developing and maintaining testbenches, writing verification plans, creating and executing test cases, and analyzing coverage results to ensure functional correctness and robustness of CPU and debug subsystems. Day-to-day tasks include collaborating with architecture, design, and firmware teams to understand specifications, modeling corner cases, debugging failures, and driving issues to closure. The position also involves working with modern verification methodologies, continuously improving verification environments, and contributing to best practices and documentation. This is a full-time role, requiring proactive communication and effective collaboration with globally distributed teams.
Qualifications
Candidates should possess strong digital design verification skills, including experience with ARM CPU cores, CoreSight debug architectures, and SoC-level integration.
Candidates should possess expertise in RTL verification methodologies, such as UVM/OVM, testbench development, constrained-random testing, and coverage-driven verification.
Candidates should possess proficiency in hardware description and verification languages (e.g., SystemVerilog, Verilog, and scripting languages like Python, Perl, or TCL).
Candidates should possess solid understanding of computer architecture concepts, including pipelines, caches, bus protocols (AXI/AHB), and low-power design considerations.
Candidates should possess skills in debugging complex issues using simulation, waveform analysis, and hardware bring-up tools, as well as familiarity with EDA tools from major vendors.
Candidates should possess strong analytical, documentation, and communication skills, with the ability to work independently in a remote, cross-functional environment.
Beneficial qualifications include experience with ASIC development flows, formal verification, emulation or FPGA prototyping, and familiarity with software-debug interfaces and JTAG.
A bachelor’s or master’s degree in Electrical/Electronics Engineering, Computer Engineering, or a related field, and relevant industry experience

Work arrangement
Yes