CPU Design Verification Engineer, Core IP

Minimum qualifications Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience. 10 years of experience in verification of IPs, Subsystems and SoCs. 8 years of experience in creating design verification strategies and plans, constraint random verification with SystemVerilog (SV) and Universal Verification Methodology (UVM). 8 years of experience in verifying multi-stage, high-performance CPU core and related peripherals, RISC-V architecture and ISA extensions.