Live opening · Posted 1 day ago

Technical Director- Analog Design

Mulya Technologies · Greater Bengaluru Area (Hybrid)
Linkedin Hybrid
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The key details from the original listing.

Posted 1 day ago
CompanyMulya Technologies
LocationGreater Bengaluru Area (Hybrid)
Work modeHybrid
SourceLinkedin
ListedPosted 1 day ago

About the role

Description supplied by the original job listing.

Technical Director-Mixed Signal IC Design (High level Proficiency and Hand-on )
Top100 Global Semiconductor Organization HQ in California. Revenue over 200 Million USD
Location: Bangalore
Location: Bangalore,
India Desired Education Level: Graduate / Doctorate and above Years of experience: MTech/M.S. with 16+ years of experience or Ph.D. with 13+ years
We are a precision timing company. Our semiconductor MEMS programmable solutions offer a rich feature set that enables customers to differentiate their products with higher performance, smaller size, lower power and better reliability. With more than 3 billion devices shipped, We are changing the timing industry.
. Job Summary Responsibilities: • Lead development of analog Mixed-signal IC and owns the top level • Supervise and review block designer work and hold design review • Work with cross-functional team to architect the chip for DFT •
Closely work and support cross functional team for bench validation, qualification and final test development. • Develop analog and mixed-signal architectures and circuits in CMOS or BiCMOS processes •
Analyze technology, architecture, circuit design, and parametric design trade-offs to meet aggressive technical performance specifications • Perform transistor-level design and simulation using industry leading EDA tools •
Lead comprehensive design reviews • Supervise Analog Circuit Physical Design Layout and edit layouts •
Collaborate with Digital Design Engineers, CAD, Systems Engineering, Test Engineering and Applications teams to ensure DFT, DFM features and achieve rapid silicon bring-up and time to production release •
Work closely with the verification team to define the verification matrix. •
Have the ownership of the top-level schematic and run all the top-level analog simulation. •
Participate in top-level AMS verification.
Qualifications & Requirements (Education must be included): • MTech/M.S. with minimum 10 years of relevant experience or Ph.D. with 6 years of Relevant experience in Electrical Engineering
• Provel track record of taking at least one analog-mixed signal part to high-volume production. •
Proven track record at each stage of the following: • Circuit architecture development and technical feasibility studies •
Writing detailed block-level specifications and review documents •
Detailed design and simulation of some of the following:
Oscillators,
ADCs,
DACs,
temperature sensors,
Integer and Fractional-N PLLs,
Digital PLLs,
low-noise op-amps,
regulators,
bandgap circuits
in CMOS or BiCMOS processes, subthreshold circuits and architecture •
Proficiency with EDA tools including Cadence Virtuoso, Spectre, ADE, Mixed-mode AMS tools, Layout XL •
Extensive knowledge of layout effects for circuit and layout design.
Ability to supervise layout designers •
Extensive experience with post-layout extraction and verifications •
Experience with validation, characterization, qualification, and adherence to production release criteria •
Ability to communicate and work effectively with geographically dispersed teams of mixed-signal, digital, verifications engineers •
Ability to work independently and drive solutions to challenging problems
Desired Characteristics & Attributes: •
An “ownership” mind set focusing on the overall success of the business. •
Can do” positive, enthusiastic attitude. •
Demonstrated analytical and problem-solving skills. •
Strong communication skills. •
Ability to work in teams and collaborate effectively with people in different functions. • Ability to efficiently context – switch between multiple concurrent tasks.
We are a Equal Opportunity Employer.
Contact:
Uday
Mulya Technologies
muday_bhaskar@yahoo.com
"Mining The Knowledge Community"

Work arrangement
Hybrid

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