Silicon Validation Engineer

About the Role
Own silicon validation for our AI accelerator end to end. You'll start in emulation and FPGA prototyping before tapeout, bring up first silicon in the lab, and carry it through to production-quality parts in the field. You'll build the validation plans, environments, and automation that prove our silicon works at scale. You'll work closely with architecture, design, firmware, software, and systems teams to find and fix issues wherever they live.
What You'll Do
Create validation plans for AI accelerator silicon, from pre-silicon through production
Build validation environments, including validation firmware, applications, test content, and silicon diagnostics
Develop test automation that scales execution and automated triage across tens to thousands of silicon samples, thousands of tests, and thousands of test hours
Run pre-silicon validation on emulation and FPGA prototyping platforms
Lead silicon and system bring-up from first power-on through full post-silicon validation, including functional validation, power and performance characterization, and characterization across process, voltage, and temperature (PVT)
Debug and root-cause issues across emulation, silicon, system hardware, firmware, and software
Support the production ramp, including system-level test (SLT), board and system test and builds, field deployment, and RMA analysis
Partner with architecture, RTL, design verification, firmware, software, board and system hardware, product and test engineering, and external partners
What We're Looking For
5+ years of experience in silicon validation, post-silicon bring-up, or a related field on complex SoCs or accelerators
Strong coding skills in C, C++, and Python, plus embedded and/or bare-metal programming experience
Hands-on experience with pre-silicon validation on emulation platforms (Palladium, ZeBu, Veloce) and FPGA prototyping platforms (Protium, HAPS, or equivalent)
Proven silicon and system bring-up experience, from first chip power-on through full post-silicon validation
Strong debug skills and fluency with debug tools such as waveform debug (Verdi, FSDB), JTAG debuggers, oscilloscopes, and logic analyzers
Experience building test automation and triage infrastructure that scales across large sample sets
Deep expertise in one or more of the following:
AI workloads, kernel operators, and collectives
PCIe Gen5/6/7
DRAM and HBM
Power and power management
Silicon and system performance
112G/224G SerDes and networking for scale-up and scale-out, including RDMA
Silicon debug and RAS features
Secure boot
Experience supporting production ramp, including SLT, board and system test, field deployment, and RMA
Strong collaboration and communication skills across silicon, systems, and external partner teams
Full compensation packages are based on candidate experience and relevant certifications.
California pay range
$250,000—$300,000 USD
Compensation
Final offers depend on level, location, and skills relevant to the role. Additional compensation: equity grant per company guidelines; medical / dental / vision; 401(k); standard PTO.
Visa Sponsorship
DensityAI sponsors qualified candidates for H-1B, O-1, TN, E-3, and other employment-based visas, and we welcome applicants on F-1 OPT and STEM-OPT. Work authorization is required at start; we provide immigration support to secure or transfer status.
Export Controls
Aspects of this role may involve access to information subject to U.S. export controls (EAR/ITAR). We may discuss licensing or scope adjustments during the interview.
Equal Opportunity
DensityAI is an Equal Opportunity Employer. We do not discriminate on the basis of race, color, religious creed, national origin, ancestry, physical or mental disability, medical condition, genetic information, marital status, sex, gender, gender identity, gender expression, age (40+), sexual orientation, military or veteran status, pregnancy, or any other status protected by law. We comply with the California CROWN Act and provide reasonable accommodations on request.