Live opening · Posted 6 hours ago

Design Verification Engineer

Cadence Design Systems · Noida, Uttar Pradesh, India (On-site)
Linkedin No 7-12 yrs
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At a glance

The key details from the original listing.

Posted 6 hours ago
CompanyCadence Design Systems
LocationNoida, Uttar Pradesh, India (On-site)
Experience7-12 yrs
Work modeNo
SkillsPython
SourceLinkedin
ListedPosted 6 hours ago

About the role

Description supplied by the original job listing.

Cadence is a pivotal leader in electronic design, building upon more than 30 years of computational software expertise. The company applies its underlying Intelligent System Design strategy to deliver software, hardware and IP that turn design concepts into reality. Cadence customers are the world’s most innovative companies, delivering extraordinary electronic products from chips to boards to systems for the most dynamic market applications including consumer, hyperscale computing, 5G communications, automotive, aerospace industrial and health.At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.The Cadence AdvantageThe opportunity to work on cutting-edge technology in an environment that encourages you to be creative, innovative, and to make an impact.Cadence’s employee-friendly policies focus on the physical and mental well-being of employees, career development, providing opportunities for learning, and celebrating success in recognition of specific needs of the employees.The unique “One Cadence – One Team” culture promotes collaboration within and across teams to ensure customer successMultiple avenues of learning and development available for employees to explore as per their specific requirement and interestsYou get to work with a diverse team of passionate, dedicated, and talented individuals who go above and beyond for our customers, our communities, and each other—every day.
We are looking for experienced IP / SoC Verification Engineers with strong hands-on exposure to IP / SoC Verification join our product validation team. Key Responsibilities:Testbench development, test creation, and executionDebugging simulation failures and protocol issuesFunctional, code, and assertion coverage closureCollaboration with design, architecture, and validation teamsSupport regression, reviews, and verification sign-off Mandatory Skills:
7-12 years of experience in IP / SoC VerificationStrong hands-on experience with SystemVerilog & UVMExperience with one or more high-speed protocols:Good understanding of SoC fundamentals Strong debugging and problem-solving skillsGood to Have Low-power verification knowledge ( UPF/ CPF)Scripting skills ( Python / Perl / Shell)EDUCATION:
MS in Electrical/Electronics/Computer Engineering with 7+ year experience or BE/BTech in Electrical/Computer/Electronics Engineering.Behavioral skills required:
Must possess strong written, verbal and presentation skills.Good communication and interpersonal skills, demonstrate teamwork and collaboration skills.Ability to establish a close working relationship with both customer peers and management.Explore what’s possible to get the job done, including creative use of unconventional solutionsWork effectively across functions and geographiesPush to raise the bar while always operating with integrity

Skills
Python

Experience
7-12 yrs

Work arrangement
No

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