STA Engineer

Company Description THINSIL is a semiconductor company focused on innovation, collaboration, and delivering cutting-edge solutions to global technology leaders. Founded on March 1, 2018, the company has rapidly grown to serve end customers such as AMD, ADI, EMM, Qualcomm, Siliconch, and Samsung. THINSIL is committed to advancing semiconductor excellence through high-quality design, engineering, and implementation services. Team members work on complex, impactful projects that help shape the future of technology for diverse market applications. The organization values technical rigor, continuous learning, and a supportive environment for professional growth.
Role Description The STA Engineer will perform static timing analysis for complex semiconductor designs, ensuring that timing requirements are met across all process, voltage, and temperature corners. Day-to-day responsibilities include developing and maintaining timing constraints, running STA tools, analyzing reports, and collaborating with design, synthesis, and physical implementation teams to resolve setup, hold, and other timing violations. The role involves creating and reviewing timing sign-off criteria, supporting timing closure throughout the design cycle, and documenting methodologies and best practices. This is a full-time, on-site role located in Bengaluru, requiring close coordination with cross-functional teams and participation in project reviews and design discussions.
Qualifications
Strong static timing analysis skills, including experience with industry-standard STA tools (e.g., PrimeTime or equivalent) and timing sign-off methodologies.
5+ years of experience in Static Timing Analysis.
Solid understanding of digital design concepts, synchronous design, clocking, and familiarity with RTL, synthesis, and physical design flows.
Knowledge of timing constraints (SDC), timing exceptions, and experience analyzing and resolving setup, hold, and path-related violations.
Ability to interpret timing reports, perform root-cause analysis, and work with design and physical implementation teams to achieve timing closure.
Proficiency with scripting languages (such as Tcl, Python, or Perl) to automate analysis tasks and improve STA workflows.
Degree in Electrical Engineering, Electronics, VLSI, or a related field, with relevant experience in semiconductor design or STA engineering.
Strong problem-solving skills, attention to detail, and the ability to communicate technical findings clearly to cross-functional stakeholders.
Previous experience in ASIC or SoC design environments, and exposure to advanced process nodes, is an advantage.

Work arrangement
No