Head of Hardware Engineering

We are looking for a hands-on technical leader to own the entire hardware engineering function across high-speed digital, analog/mixed-signal, FPGA, PCB, and full system integration through to ruggedized, manufacturable products. You will be the single point of accountability for the hardware roadmap across every product line. A quantum or photonics background is not required. That domain knowledge sits with the physics and product teams. What is needed is a world-class electronics leader who can architect and ship complex mixed-signal and FPGA-heavy products at a production scale. This is a critical, end-to-end ownership role. You will set technical direction, build and mentor the team, drive design-for-manufacturing and qualification, and represent hardware capabilities to government and enterprise customers.
Responsibilities:
Own the full hardware lifecycle, including requirements capture, architecture, schematic and PCB design, FPGA RTL and verification, bring-up, characterization, EVT/DVT/PVT, qualification, and volume manufacturing transfer.
Partition and architect FPGA and digital subsystems, including Zynq UltraScale+ MPSoC and Versal-class designs.
Lead high-speed SerDes (JESD204C), DSP pipelines (DSP48E2), and embedded Linux/PetaLinux integration for signal processing applications.
Design and oversee analog and mixed-signal front ends, including low-noise amplifiers, high-speed Gsps-class ADC/DAC interfacing, precision clocking and timing distribution, low-jitter PLL architectures, high-resolution data acquisition, and the full sensor-to-digital signal chain.
Drive PCB and system integration for high-speed digital and mixed-signal stack-ups, signal and power integrity, EMI/EMC compliance, and ruggedized industrial and defense-grade enclosures.
Build, structure, and mentor a hardware engineering team of 15+ across digital, analog, FPGA, and layout disciplines.
Set engineering standards, conduct design reviews, and establish quality gates.
Represent hardware engineering to customers and partners, including government and international stakeholders, and translate field requirements into product specifications.
Own DFM/DFT/DFA, supplier qualification, component obsolescence strategy, and the path from prototype to volume production.
Drive patent generation, contribute to relevant security standards, and ensure compliance with FIPS, Common Criteria, and applicable defense qualification standards.
Requirements:
15+ years of experience in hardware engineering, with at least 5 years leading multidisciplinary teams.
Demonstrated track record of taking complex hardware products from concept to volume production.
Deep expertise across high-speed digital design, FPGA, and analog/mixed-signal engineering.
High-speed digital design experience, including multi-Gbps interfaces, DDR4/DDR5 PCIe Gen3/Gen4/Gen5 10/25/100G Ethernet, SerDes channel design and equalization, signal- and power-integrity simulation using tools such as HyperLynx, ADS, HFSS, and Sigrity, SoC integration, embedded Linux/PetaLinux, secure boot, and root-of-trust architectures.
FPGA expertise with Xilinx/AMD Zynq UltraScale+ and Versal, Vivado, MPSoC architecture and partitioning, AXI interconnect, high-speed SerDes (GTH/GTY/GTM), JESD204B/C, DSP pipelines, RTL coding in SystemVerilog/VHDL, constrained-random verification using UVM, simulation, and timing closure on demanding designs.
Analog and mixed-signal expertise, including low-noise amplifier design, high-speed ADC/DAC interfacing, precision timing and clock distribution, low-jitter PLLs, low-noise power-supply design for noise-sensitive instrumentation, and management of the analog-digital boundary on mixed-signal boards.

Experience
11-15 yrs