Senior RTL Design Engineer

About Company
At 7Rays Semiconductors (https://7rayssemi.com/), we provide end-to-end VLSI design solutions to help our clients achieve execution excellence. Our team of experts specializes in architecture, RTL design, verification, validation, physical design, implementation, and post-silicon validation using the latest technologies and methodologies
We work closely with our clients, building effective partnerships to deliver high-quality solutions tailored to their needs. With a proven track record of successful projects, we are committed to excellence and innovation in semiconductor design.
Job Title: Lint/CDC Design Lead
Experience: 5+ years of relevant experience
Strong in digital IP design using RTL for lower technology nodes [3/4/7nm].
Experience in micro architect and implementation of complex IP blocks for high-speed designs.
Optimization of digital logic by analysing timing reports at various stages of ASIC design cycles and defining solutions for path.
Experience in developing modules for AXI4/5, CHI interfaces.
Experience in RTL implementation of PCIe/CXL, Ethernet, UCIE , UAL, DDR/HBM/LPDDR and AXI bridging layer.
Experience in the closure of RTL blocks with quality checks, CDC/RDC/Lint.
Define and propose innovative solutions to the problem.
Good team player, proactive in communications, lead proposed solutions to closure.
Documentation on design approaches, discuss it within the team, come up with conclusive approaches and drive it.
Co-work with other functional teams on project

Work arrangement
Hybrid