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Product Validation Engineer | Siemens EDA (Contract)
Join our team and be part of a group developing and validating next generation C++ and SystemC based verification and coverage technologies.
Location: Noida
Role: Product Validation Engineer - CCOV
Experience: Fresher / Entry Level
What You'll Do
• Work on validation and verification of CCOV (Catapult Coverage) features and enhancements.
• Develop and execute test cases to validate functional and coverage related features.
• Analyze requirements and create effective test plans and validation strategies.
• Debug failures across C++, SystemC, Verilog/SystemVerilog and tool flows.
• Participate in regression execution, failure analysis and release quality validation.
• Improve and automate validation flows using scripting and other productivity tools.
• Contribute to technical discussions, reviews and continuous improvement of product validation methodologies.
What We Are Looking For
• Strong fundamentals in C++ and object oriented programming.
• Strong understanding of Digital Electronics and Digital Logic.
• Good knowledge of Verilog and SystemVerilog.
• Good understanding of RTL design and functional verification concepts.
• Strong debugging and problem solving skills.
• Ability to analyze failures, identify root causes and systematically debug complex issues.
Good to Have
• Knowledge of SystemVerilog Assertions (SVA).
• Knowledge of UVM and verification methodologies.
• Understanding of Static Timing Analysis (STA).
• Experience with SystemC or C++ based hardware modelling.
• Scripting knowledge in Python, Perl, Tcl, Shell, or similar languages.
• Familiarity with EDA tools, simulation, synthesis, or coverage concepts.
Education
• B.Tech / B.E. or M.Tech / M.E. in Electronics, Electrical, Computer Science, or a related engineering discipline.
• Fresh graduates with strong technical fundamentals are encouraged to apply.
📩 Interested candidates can share their resumes with me via LinkedIn DM or email at savinay.salooja.ext@siemens.com
Work arrangement
Hybrid
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