Design Verification Engineer

Company Description Chiplogic Technologies (Chiplogic) is an IP and product engineering services company founded in 2018, specializing in Semiconductor, Systems, IoT, and AI/ML domains. The company delivers high-quality, dependable solutions that span from concept to silicon, including ODC and full turnkey semiconductor design and system solutions. Chiplogic also provides POCs and end-to-end IoT system solutions tailored to diverse customer needs. In the AI/ML space, the organization builds services around its proprietary VISARD™ (Video Synthesis And Real-time Dynamics) framework, enabling advanced video and real-time analytics applications. Team members collaborate on cutting-edge technologies and complex engineering challenges in a dynamic, innovation-driven environment.
Role Description We are looking for experienced Design Verification Engineers with strong expertise in ASIC verification, SystemVerilog, and UVM to join our engineering team.
Key Responsibilities
Develop verification plans based on design specifications.
Build and maintain SystemVerilog/UVM testbenches, verification environments, sequences, and reusable components.
Perform functional verification at IP, subsystem, and SoC levels.
Develop directed and constrained-random tests to validate functionality and identify corner cases.
Analyze regressions, debug failures, and collaborate with RTL designers to resolve defects.
Drive functional and code coverage closure.
Implement SystemVerilog Assertions and support verification reviews.
Mentor junior engineers and contribute to verification methodology improvements.
Required Skills
5–10 years of hands-on experience in ASIC Design Verification.
Strong proficiency in SystemVerilog and UVM.
Experience with constrained-random verification, scoreboards, checkers, and coverage models.
Strong understanding of digital design concepts and RTL.
Experience with simulation and debugging tools such as VCS, Questa, or Xcelium.
Knowledge of protocols such as AXI, AHB, or APB.
Strong analytical, debugging, and communication skills.
Preferred Qualifications
Experience in SoC verification and C-based testing.
Exposure to PCIe, DDR, Ethernet, or other high-speed interfaces.
Knowledge of Python, Perl, or Shell scripting.
Bachelor’s or Master’s degree in Electronics, Electrical Engineering, or a related discipline.
Immediate joiners preferred.
Eligibility: This position is exclusively for professionals with 5–10 years of relevant Design Verification experience. Interns, recent graduates, and candidates with less than 5 years of relevant experience are requested not to apply.

Work arrangement
No