Design Verification Engineer

Qualifications
Strong skills in RTL Design and Computer Architecture, with the ability to understand and interpret complex digital design specifications.
Hands-on experience with Functional Verification, including testbench development, simulation, and coverage-driven verification.
Proficiency in Formal Verification methodologies and tools, applying formal techniques to validate critical design components.
Demonstrated Debugging skills for identifying root causes of design and verification issues and implementing effective fixes.
Experience with industry-standard verification languages and tools (e.g., SystemVerilog, UVM, simulation and formal tools such as Questa, VCS, JasperGold) is highly beneficial.
Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, Computer Science, or a related technical field.
Ability to work effectively in a remote environment, manage time independently, and collaborate with distributed engineering teams.
Strong analytical thinking, attention to detail, and clear written and verbal communication skills.
Prior experience in ASIC/SoC or FPGA design verification projects is a plus.

Work arrangement
Yes