SOC Design Engineer - Semiconductor

SoC Design Engineer
In this role you will take ownership of all aspects related to design and implementation
of different blocks and SoC subsystems. You will be involved directly in all aspects of
chip design. From writing architectural specifications to support PCB teams responsible
for product design
What you’ll do:
Write architecture specifications for SoC subsystems
Integrate subsystems at SoC level.
Discuss with IP providers about best configuration for given subsystems
Create and/or propagate subsystem constraints from block to SoC level. This
includes timing (SDC) and power intent (UPF)
Develop and maintain flows to guarantee design quality (CDC, RDC, linting,
power analysis flows, etc)
Analyze performance, power, area reports and provide solutions to improve
this metrics
Support synthesis and P&R team debugging and fixing timing/DfT/power
related issues.
Support PCB design teams
Minimum Qualifications:
MSc degree in related field such as electrical engineering or equivalent years of
experience
4+ years of experience in SoC integration roles
Knowledge, Skills & Abilities:
Experience integrating complex SoC subsystems. Examples include
processors, PCIe, DDR etc.
Experience with RTL design methodologies and languages (Verilog,
SystemVerilog, VHDL)
Experience setting up quality flows such as CDC/RDC/linting
Experience setting up power analysis and synthesis flows
Solid modeling, programming and scripting skills (2+ years of e.g. Tcl, Python)
Excellent written and verbal English communication
Preferred Qualifications:
Hands on experience integrating ARM class A or R CPU
Hands on experience integrating GPUs
Hands on experience integrating systems with MMUs
Hands on experience integrating system that requires cache coherence
Hands on experience in RTL to GDS design flows
Basic knowledge of verification flows (e.g. UVM)
Experience using Synopsys tools such as VCS/verdi, Spyglass, DC compiler,
RTL-architect
Basic to medium level knowledge using C for embedded system

Work arrangement
Yes