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Minimum qualifications Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience. 8 years of experience in architecture and micro-architecture design of graphics or Machine Learning (ML) or Ethernet/ROCE/UAL/NVlink scaleup/out fabrics or managing Low Precision/Mixed Precision Numerics/Vector processors/DSP processors or experience architecting networking ASICs. Experience in memory hierarchy on chip fabrics, memory controllers, High Bandwidth Memory (HBM), and Dynamic Random-Access Memory (DRAM) technologies.
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