Staff Digital IC Design Engineer

Objective of the role:
Based in our Cambridge office you will work closely with colleagues locally and in the other IC Design Centres to implement all the digital functions of the mixed signal products developed by Power Integrations. You will work with the Product Definition, IC Design and Test Engineering teams to provide digital solutions to meet the system requirements, interface to the analogue circuits and provide suitable DFT coverage respectively. In addition, you will develop behavioural models to help accelerate system simulation or form part of system emulation.
Main Responsibilities:
Development of functional digital blocks and contribution to complete mixed signal ASICs from definition to full production maturity.
Support the Product Definition team with feasibility study, product architecture definition and digital blocks design for FPGA emulation.
Complete RTL design in SystemVerilog of digital functions to meet all system requirements.
Create suitable block-level test benches for comprehensive verification of all digital blocks.
Create suitable behavioural models and top-level test benches for comprehensive verification and regression of all system-level functions and production test functions.
Complete digital synthesis with suitable physical constraints to meet all PPA requirements.
Define and implement DFT architecture. Perform scan insertion, ATPG and insert test points to achieve the required test coverage.
Oversee digital place-and-route, and ensure post-layout timing closure.
Generate all necessary design documentation and participate in design reviews.
Lead and oversee other team members to achieve the above.
Take a lead in digital design methodology improvements within the company.
Education & Work Experience Requirements:
MSc/MEng or PhD in Electronics Engineering or related subject.
Minimum 5 years’ experience in digital IC design using standard cell libraries.
As a Staff Digital IC Design Engineer, you should:
Have in depth knowledge and understanding of best-practice digital design methods.
Be an expert at executing designs via a fully synthesised digital design flow with RTL and logic synthesis.
Be fully conversant with the SystemVerilog standard and digital EDA tools.
Be familiar with the use of constraints and the automatic place-and-route flow for the physical design.
Understand the importance of production test and have experience of design methods to maximize digital test coverage such as scan.
Have experience of design techniques for optimising digital power consumption.
Have experience of debugging digital functions in a lab using suitable test equipment (e.g. mixed-signal oscilloscopes).
Have experience with scripting languages such as TCL/Python.
Have experience producing accurate and complete documentation.
What we offer in return and in addition to a competitive base salary:
Health & Wellbeing
Private healthcare (option to add on dependents for free)
Enhanced Sick Pay
Group Income Protection scheme
Employee Assistance Programme
Group Life scheme
Cycle2Work - savings of at least 32% on a new bike or accessories
Financial Incentives
ESPP (employee stock purchase plan) – Option to join scheme twice a year
Pension scheme- A contributory private pension
Generous Employee referral bonus (& I-Pad raffle)