Silicon Micro-Architecture and RTL Lead, Google Cloud

Minimum qualifications Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience. 10 years of experience in Application-Specific Integrated Circuit/System on a chip (ASIC/SoC) development with Verilog/SystemVerilog. Experience in micro-architecture and design of IPs and Subsystems. Experience in ASIC design verification, synthesis, timing/power analysis, and Design for Testing (DFT).