Live opening · Posted 6 hours ago

Senior AMS Verification Engineer – Espoo

ETAS · Espoo, Uusimaa, Finland
Smartrecruiters No Full-time
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At a glance

The key details from the original listing.

Posted 6 hours ago
CompanyETAS
LocationEspoo, Uusimaa, Finland
Job typeFull-time
Work modeNo
SourceSmartrecruiters
ListedPosted 6 hours ago

About the role

Description supplied by the original job listing.

At our Finland development centers in Oulu and Espoo, we are pioneering SoC MEMS+ASIC solutions for a diverse range of consumer and industrial applications. As a Senior AMS Verification Engineer, you will play a pivotal role in shaping the future of our technology.
Your Responsibilities Will Include:
Driving Innovation: You work as part of interdisciplinary team developing mixed signal ICs for consumer market space from concept to implementation. You are partly responsible for developing leading edge analog IP as well as efficient mixed signal verification flows.
Ensuring Design Integrity: You will ensure 'First Time Right' ICs by executing comprehensive simulations at different abstraction levels, e.g. at transistor, model and top levels.
Holistic System Design: You understand block and top-level requirements, tools and can operate in different design/verification roles as needed. You collaborate closely with analog, digital, software, layout, verification and test teams and come up with solutions that produce optimal system performance.
Global Collaboration: You communicate and collaborate within an international and globally distributed team of experts.
What We Look For:
Personality: High level of enthusiasm, creativity, and willingness to work as part of an international and interdisciplinary team.
Work Ethic & Practice: Focused and structured working practices with a capability of independent work
Experience: Proven successful industrial track record in IC design as a senior analog/lead/AMS engineer is mandatory. Demonstrated understanding of analog circuit design, including block and top-level concepts, circuit topologies, design trade-offs, and transistor-level understanding. Experience in ramping up top-level AMS/DMS verification environments, including building top-level schematics. Strong system level understanding to support “First Time Right” product delivery. A solid understanding of hardware description languages (Verilog-A, Verilog-AMS & SystemVerilog), with emphasis on their use in analog and mixed-signal simulation.
Language Proficiency: Proficient English language skills.
Education: Degree (M.Sc., B.Sc. or Ph.D.) in electrical engineering or equivalent.

Employment type
Full-time

Work arrangement
No

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