Senior Design Verification Engineer

Company Description VeriFast Technologies is a product engineering company focused on bridging complex hardware architectures with intelligent software applications. The organization delivers end-to-end “chip-to-cloud” ecosystems that optimize performance across the entire technology stack for global enterprises. Core capabilities include silicon engineering and turnkey ASIC solutions, covering the full RTL-to-GDSII flow and advanced technology nodes such as 16nm, 7nm, 5nm, and 3nm. VeriFast also develops secure, scalable embedded, Edge AI, and IoT architectures, and applies next-generation Quality Engineering with AI-driven risk assessment and predictive mitigation. Team members collaborate on cutting-edge semiconductor and AI solutions that drive real-world digital transformation.
Role Description The Senior Design Verification Engineer role is a full-time, on-site position based in Ahmedabad. This role involves owning and executing verification plans for complex digital designs, including testbench development, test case creation, and coverage-driven verification using industry-standard methodologies and tools. The engineer will perform functional and formal verification, conduct thorough debugging of RTL and testbench issues, and collaborate closely with design, architecture, and validation teams to ensure high-quality silicon. Daily responsibilities include analyzing specifications, creating verification environments, reviewing results, driving closure on coverage and bugs, and contributing to methodology improvements and documentation. The Senior Design Verification Engineer is expected to mentor junior team members and support project planning and technical reviews.
Qualifications
· Bachelor's or Master's degree in Electronics, Electrical Engineering, Computer Science, or a related field.
· 4–7 years of hands-on experience in ASIC/SoC Design Verification.
· Strong expertise in:
o SystemVerilog
o UVM Methodology
o C/C++
· Experience with one or more of the following protocols:
o PCIe (PCI Express)
o UCIe
o CXL
o RISC-V
· Good understanding of digital design fundamentals and ASIC verification flows.
· Experience with IP and SoC verification methodologies.
· Hands-on experience with on-chip bus protocols such as:
o AXI
o AHB/APB
· Strong debugging, problem-solving, and analytical skills.

Work arrangement
No