Senior Analog Layout Engineers

Company Description SiMaxTech Pvt Ltd is a fast-growing semiconductor design services company that delivers end-to-end chip solutions to global customers. The organization combines strong expertise across the semiconductor value chain with a focus on high performance, quality, and accelerated time-to-market. Its engineering team works across the full design spectrum, including analog circuit design, RTL, verification, custom layout, physical design, and embedded design, spanning technology nodes from 65nm to advanced nodes such as 7nm, 5nm, 3nm, 2nm, and 18A. Guided by a vision to be the preferred design services partner worldwide, SiMaxTech emphasizes continuous learning, innovation, and execution excellence. The company offers a customer-centric environment with a proven track record in delivering scalable, reliable semiconductor solutions.
Role Description The Senior Analog Layout Engineer role is a full-time, on-site position based in Bengaluru South. In this role, the engineer is responsible for designing, implementing, and optimizing analog circuit layouts, ensuring compliance with foundry rules and performance targets. Day-to-day tasks include collaborating with analog design teams, performing layout floorplanning, device placement, routing, matching, and parasitic-aware design, as well as conducting physical verification (DRC/LVS/EM/IR) to meet tape-out quality standards. The engineer will review schematics, provide layout feedback to circuit designers, and support design iterations to achieve area, power, and performance goals. The role also involves mentoring junior layout engineers, contributing to layout methodology improvements, and coordinating closely with cross-functional teams across the chip development lifecycle.
Hiring #AnalogLayoutEngineers,
Experience: 4+Years
Location: Bangalore
Notice Period: Immediate to 30 Days
Qualifications
Candidates should possess strong skills in Layout Design and Custom Layout for complex analog and mixed-signal blocks.
Candidates should possess solid experience in Circuit Design, with emphasis on Analog and Analog Circuits for high-performance and low-power applications.
Candidates should possess proficiency in Physical Verification, including DRC, LVS, ERC, EM/IR checks, and sign-off flows.
Hands-on experience with industry-standard EDA tools (e.g., Cadence Virtuoso, Mentor/Siemens, Synopsys) and familiarity with advanced process nodes is beneficial.
A bachelor’s or master’s degree in Electrical/Electronics Engineering or a related field, with substantial experience in analog layout engineering, is preferred.
Strong analytical and problem-solving abilities, attention to detail, and capability to work effectively in collaborative, fast-paced design environments are important.
Prior experience in full-chip integration, AMS blocks, and coordination with front-end and back-end teams is a plus.

Work arrangement
No