Live opening · Posted 6 hours ago
RTL Engineer
Cyient · Greater Hyderabad Area (On-site)
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At a glance
The key details from the original listing.
CompanyCyient
LocationGreater Hyderabad Area (On-site)
Work modeNo
Source
Linkedin
Listed6 hours ago
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About the role
Description supplied by the original job listing.
Job Description: Simulation Migration Engineer(SV/UVM)
Experience: 5 Years
Location: Hyderabad
Key Requirements:
Strong hands-on experience in SystemVerilog (SV) and UVM methodology
Experience in simulation migration activities, specifically from VCS to Xcelium (Exilium)
Good understanding of low power verification concepts
Expertise in functional verification, including testbench development and execution
Strong skills in coverage analysis (functional & code coverage)
Proficient in debugging simulation issues and regression failures
Experience in verification environment bring-up and migration support
Work arrangement
No
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