Design Verification Engineer_PCie(SOC)_8+years_Bangalore

Company Description AIonSi is a semiconductor solutions startup delivering VLSI design and verification, automotive functional safety, and artificial intelligence solutions to clients worldwide. Led by a group of seven industry experts, the company focuses on providing end-to-end services for complex SoC designs and taking complete ownership from concept to implementation. AIonSi operates as a one-stop platform, emphasizing best-in-class service without compromising on quality. The organization offers comprehensive expertise in IP and SoC design, integration, verification, PCIe, and physical design, creating opportunities for engineers to work on challenging and cutting-edge projects.
Role Description This is a full-time, on-site Design Verification Engineer role located in Bengaluru South, focused on PCIe-based SoC verification for complex semiconductor designs. The individual in this role will develop and execute verification plans, testbenches, and testcases for PCIe subsystems and SoC-level integration, ensuring functional correctness and coverage closure. Day-to-day responsibilities include performing functional and formal verification, debugging RTL and testbench issues, analyzing simulation results, and collaborating with design, architecture, and validation teams to resolve problems and improve overall quality. The engineer will also contribute to verification methodology improvements, documentation of verification environments, and alignment with project schedules and quality standards.
Qualifications
Strong Functional Verification skills, including testbench development, constrained random testing, coverage analysis, and verification planning.
Experience with Formal Verification techniques and tools for validating critical logic and ensuring design robustness.
Proficiency in RTL Design and understanding of HDL languages (e.g., Verilog/SystemVerilog) for analyzing and reviewing design implementations.
Solid foundation in Computer Architecture, including SoC architecture, interconnects, and PCIe protocol concepts.
Advanced Debugging skills for simulation failures, waveform analysis, and root-cause identification in complex SoC environments.
8+ years of relevant experience in design verification, preferably on PCIe or high-speed interface-based SoCs.
Hands-on experience with industry-standard EDA tools, simulators, and version control systems.
Bachelor’s or Master’s degree in Electrical Engineering, Electronics, Computer Engineering, or a related discipline.
Ability to collaborate effectively in cross-functional teams, communicate technical concepts clearly, and work independently with ownership of deliverables.
Exposure to automotive functional safety standards, AI accelerators, or complex IP integration is an advantage.
Experience : 8+ years
Location : Bangalore
Preference : Immediate Joiners

Work arrangement
No